A low-power low-noise accurate linear-in-dB variable-gain amplifier with 500-MHz bandwidth

2000 ◽  
Vol 35 (12) ◽  
pp. 1942-1948 ◽  
Author(s):  
S. Otaka ◽  
G. Takemura ◽  
H. Tanimoto
2012 ◽  
Vol 195-196 ◽  
pp. 84-89
Author(s):  
Da Hui Zhang ◽  
Ze Dong Nie ◽  
Feng Guan ◽  
Lei Wang

A low-power, wideband signaling receiver for data transmission through a human body was presented in this paper. The receiver utilized a novel implementation of energy-efficient wideband impulse communication that uses the human body as the transmission medium, provides low power consumption, high reception sensitivity. The receiver consists of a low-noise amplifier, active balun, variable gain amplifier (VGA) Gm-C filter, comparator, and FSK demodulator. It was designed with 0.18um CMOS process in an active area of 1.54mm0.414mm. Post-simulation showed that the receiver has a gain range of-2dB~40dB. The receiver consumes 4mW at 1.8V supply and achieves transmission bit energy of 0.8nJ/bit.


2018 ◽  
Vol 27 (09) ◽  
pp. 1850135 ◽  
Author(s):  
Sawssen Lahiani ◽  
Samir Ben Salem ◽  
Houda Daoud ◽  
Mourad Loulou

This paper presents the design of a new Digital Variable Gain Amplifier cell (DVGA). The proposed circuit based on transconductance, gm, amplifier and a transconductance amplifier is analyzed and designed for a cognitive radio receiver. The variable-gain amplifier (VGA) proposed consists of a digital control block, an auxiliary pair to retain a constant current density, and offers a gain-independent bandwidth (BW). A novel cell structure is designed for high gain, high BW, low power consumption and low Noise Figure (NF). The Heuristic Method is used to optimize the proposed circuit performance for high gain, low noise and low power consumption. This circuit is implemented and simulated using device-level description of TSMC 0.18[Formula: see text][Formula: see text]m CMOS process. Simulation results show that the DVGA can provide a gain variation range of 54[Formula: see text]dB (from 54[Formula: see text]dB to 0[Formula: see text]dB) with a 3[Formula: see text]dB BW over more than 110[Formula: see text]MHz. The circuit consumes the maximum power of 0.65[Formula: see text]mW from a 1.8[Formula: see text]V supply.


2012 ◽  
Vol 59 (10) ◽  
pp. 2176-2185 ◽  
Author(s):  
Zhiming Chen ◽  
Yuanjin Zheng ◽  
Foo Chung Choong ◽  
Minkyu Je

2019 ◽  
Vol 66 (7) ◽  
pp. 1104-1108 ◽  
Author(s):  
Filipe Dias Baumgratz ◽  
Carlos Saavedra ◽  
Michiel Steyaert ◽  
Filip Tavernier ◽  
Sergio Bampi

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