A wideband CMOS sigma-delta modulator with incremental data weighted averaging

2002 ◽  
Vol 37 (1) ◽  
pp. 11-17 ◽  
Author(s):  
Tai-Haur Kuo ◽  
Kuan-Dar Chen ◽  
Horng-Ru Yeng
Author(s):  
Ali Kerem Nahar ◽  
Ansam Subhi Jaddar ◽  
Hussain K. Khleaf ◽  
Mohmmed Jawad Mortada Mobarek

<p>In general, the noise shaping responses, a cyclic second order response is delivered by the method of data weighted averaging (DWA) in which the output of the digital-to-analog convertor (DAC) is restricted to one of two states. DWA works efficiently for rather low levels of quantizing; it begins presenting considerable difficulties when internal levels of quantizing are extended further. Though, each added bit of internal quantizing causes an exponentially increasing in power dissipation, complexity and size of the DWA logic and the DAC. This gives a controlled seconnd order response accounting for the mismatch of the elements of DAC. The multi-bit DAC is made up of numerous single-bit DACs having values thereof chosen via a digital encoder. This research presents a discussion of the influence of mismatching between unit elements of the Delta-Sigma DAC. This results in a constrained second order response accounting for mismatch of DAC elements. The results of the simulation showed how the effectiveness of DWA method is in reducing band tones. Furthermore, DWA method has proved its efficiency in solving the mismatching of DAC unit elements. The noise of the mismatching elements is enhanced 11 dB at 0.01 with the proposed DWA, thereby enhancing the efficiency of the DAC in comparison to the efficiency of the DAC with no use of the circuit of DWA</p>


2009 ◽  
Vol E92-C (6) ◽  
pp. 860-863 ◽  
Author(s):  
Lukas FUJCIK ◽  
Linus MICHAELI ◽  
Jiri HAZE ◽  
Radimir VRBA

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