Second order noise shaping for data-weighted averaging technique to improve sigma-delta DAC performance

<p>In general, the noise shaping responses, a cyclic second order response is delivered by the method of data weighted averaging (DWA) in which the output of the digital-to-analog convertor (DAC) is restricted to one of two states. DWA works efficiently for rather low levels of quantizing; it begins presenting considerable difficulties when internal levels of quantizing are extended further. Though, each added bit of internal quantizing causes an exponentially increasing in power dissipation, complexity and size of the DWA logic and the DAC. This gives a controlled seconnd order response accounting for the mismatch of the elements of DAC. The multi-bit DAC is made up of numerous single-bit DACs having values thereof chosen via a digital encoder. This research presents a discussion of the influence of mismatching between unit elements of the Delta-Sigma DAC. This results in a constrained second order response accounting for mismatch of DAC elements. The results of the simulation showed how the effectiveness of DWA method is in reducing band tones. Furthermore, DWA method has proved its efficiency in solving the mismatching of DAC unit elements. The noise of the mismatching elements is enhanced 11 dB at 0.01 with the proposed DWA, thereby enhancing the efficiency of the DAC in comparison to the efficiency of the DAC with no use of the circuit of DWA</p>

SFDR Improvement Algorithms for Current-Steering DACs

This paper presents algorithms for improving spurious-free dynamic range (SFDR) of current-steering digital-to-analog converters (DACs) — targeted at communication applications — by minimizing both current-source mismatches and glitches. Conventional segmented current-steering DACs suffer from static mismatches among current sources which cause nonlinearity and degrade SFDR, though glitch energy is relatively small. The data-weighted averaging (DWA) algorithm can reduce static current source mismatch effects, but it increases the effects of glitch energy. Here we investigate the use of both conventional Switching-Sequence Post-Adjustment (SSPA) calibration and One–Element-Shifting (OES) methods in order to reduce the effects of both nonlinearity and glitch energy. For further improvement, we propose and investigate a fully-digital combined algorithm to reduce static current source mismatch effects with minimal increase in the glitch energy. We also did simulations of the effect of combining these two compensation methods. Our MATLAB simulations show that the combined algorithm can improve SFDR performance by 24 dB, 22dB and 2dB compared to conventional thermometer-coded, one-element-shifting and SSPA methods respectively in some conditions. When we take current mismatch into account, the combined algorithm causes glitch energy to increase by only 0.02 to 0.2 % compared to the other three methods alone.

An Improved Data Weighted Averaging for Segmented Current-Steering DACs

An improved DWA method for 14-bit 5+4+5 segmented current-steering digital-to-analog converters is proposed. Through to SFDR and dynamic performance of compromise consideration, this method uses two barrel shifters to control the starting position of the current element sequence every four clocks. Compared with the conventional DWA method, it features smaller device size and improves SFDR. And based on SIMULINK platform, through the establishment of high level of current steering D/A converter model with matching errors and output impedance. The simulation results show that SFDR is improved about 25dB.