HPDP: Architecture and design flow: High performance data processor

Author(s):  
Olga Dokianaki ◽  
Volker Baumgarte ◽  
Mohsin Syed ◽  
Constantin Papadas ◽  
Tim Helfers ◽  
...  
2012 ◽  
Vol 203 ◽  
pp. 469-473
Author(s):  
Ruei Chang Chen ◽  
Shih Fong Lee

This paper presents the design and implementation of a novel pulse width modulation control class D amplifiers chip. With high-performance, low-voltage, low-power and small area, these circuits are employed in portable electronic systems, such as the low-power circuits, wireless communication and high-frequency circuit systems. This class D chip followed the chip implementation center advanced design flow, and then was fabricated using Taiwan Semiconductor Manufacture Company 0.35-μm 2P4M mixed-signal CMOS process. The chip supply voltage is 3.3 V which can operate at a maximum frequency of 100 MHz. The total power consumption is 2.8307 mW, and the chip area size is 1.1497×1.1497 mm2. Finally, the class D chip was tested and the experimental results are discussed. From the excellent performance of the chip verified that it can be applied to audio amplifiers, low-power circuits, etc.


2009 ◽  
Author(s):  
Uri Cummings ◽  
Dan Daly ◽  
Rebecca Collins ◽  
Virat Agarwal ◽  
Fabrizio Petrini ◽  
...  

2021 ◽  
Vol 64 (5) ◽  
pp. 759-764
Author(s):  
S. Yu. Ksenofontov ◽  
A. V. Kupaev ◽  
T. V. Vasilenkova ◽  
D. A. Terpelov ◽  
P. A. Shilyagin ◽  
...  

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