An output impedance-based design of voltage regulator output capacitors for high slew-rate load current transients

2004 ◽  
Author(s):  
Jia Wei ◽  
F.C. Lee
Keyword(s):  
Voltage Regulator ◽  
Slew Rate ◽  
Output Impedance ◽  
Load Current ◽  
Current Transients

Self-Reduction Quiescent Current Low Power Low Dropout Regulator for SoC Application

2012 ◽  
Vol 591-593 ◽  
pp. 2632-2635
Author(s):  
Lee Chu Liang ◽  
Roslina Mohd Sidek
Keyword(s):  
Low Power ◽  
Process Model ◽  
High Efficiency ◽  
System Stability ◽  
Cmos Process ◽  
Output Impedance ◽  
Load Current ◽  
Output Load ◽  
Quiescent Current ◽  
Low Dropout Regulator

A low power low-dropout (LDO) voltage regulator with self-reduction quiescent current is proposed in this paper. This proposed capacitorless LDO for Silicon-on-Chip (SoC) application has introduced a self-adjustable low-impedance circuitry at the output of LDO to attain stability critically during low output load current (less than a few hundred of micro-ampere). When the LDO load current increases, it reduces the LDO output impedance and moved the pole towards higher frequency away from the dominant pole and improving the system stability. When this happen, less amount of quiescent current is needed for the low-impedance circuitry to sustain the low output impedance. In this proposed LDO, the quiescent current that been used to sustain the low output impedance will be self-reduced when the output load current increases. Thus, the reduction of quiescent current at low output load current has tremendously improved the efficiency. The simulation results have shown a promising stability at low load current 0~1mA. The dropout voltage for this LDO is only 100mV at 1.2V supply. The proposed LDO is validated using Silterra 0.13μm CMOS process model and designed with high efficiency at low output load current.

A Multi-Loop Slew-Rate-Enhanced NMOS LDO Handling 1-A-Load-Current Step With Fast Transient for 5G Applications

2020 ◽  
Vol 55 (11) ◽  
pp. 3076-3086 ◽  
Author(s):  
Kan Li ◽  
Chuanshi Yang ◽  
Ting Guo ◽  
Yuanjin Zheng
Keyword(s):  
Slew Rate ◽  
Load Current ◽  
Current Step ◽  
Fast Transient

Slew Rate and Transient Response Enhancement in MOLDO with Modifying Error Amplifier Structure

2017 ◽  
Vol 26 (12) ◽  
pp. 1750197 ◽  
Author(s):  
Fatemeh Abdi ◽  
Mahnaz Janipoor Deylamani ◽  
Parviz Amiri
Keyword(s):  
Transient Response ◽  
Output Voltage ◽  
Input Voltage ◽  
Bias Current ◽  
Cmos Process ◽  
Slew Rate ◽  
Load Current ◽  
Rate Enhancement ◽  
Error Amplifier ◽  
Response Enhancement

In this paper, we use bias current boosting and slew rate enhancement in multiple-output Low-dropout structure to achieve a faster transient response. This method reduces ripples of output voltage during sudden changes in load current and input voltage. The proposed MOLDO circuit was simulated with a 0.18[Formula: see text][Formula: see text]m CMOS process in buck mode with four-output legs. Integrating of proposed circuit is easier because there is the symmetry in the circuit designing. The results of our work show that when input voltage changes between 2.5–3.3[Formula: see text]V, the output voltage after 25[Formula: see text][Formula: see text]s with load current of 100[Formula: see text]mA, is determined with ripple less than 1.8[Formula: see text]mV. In sudden changes, the load current at the range 0–100[Formula: see text]mA, and output voltages after a maximum 15.5[Formula: see text][Formula: see text]s with an input voltage of 3.3[Formula: see text]V have the highest ripple in output voltage of 4[Formula: see text]mV.

scholarly journals Efficiency of Synchronous and Asynchronous Buck-Converter at Low Output Current.

2019 ◽  
Vol 27 (2) ◽  
pp. 194-206
Author(s):  
Ismael Khaleel Murad
Keyword(s):  
Duty Cycle ◽  
Buck Converter ◽  
Voltage Regulator ◽  
Switching Frequency ◽  
Output Current ◽  
Load Current ◽  
Small Load ◽  
Step Down ◽  
Conduction Mode ◽  
Continuous Conduction Mode

In this paper both synchronous and asynchronous buck-converter were designed to work in continuous conduction mode “CCM” and to deliver small load current. Then the two topologies were tested in terms of efficiency at small load current by use of  different values of switching frequencies (range from 150 KHz to 1MHz) and three separated values of duty-cycle (0.4, 0.6 and 0.8).   Obtained results turns out that efficiency of both synchronous and asynchronous buck-converter “switching step-down voltage regulator” responds in a negative manner to the increase in the switching frequency. However, this impact is being stronger in synchronous topology because of magnifying effect of losses related to switching frequency compared to those related to conduction when working at small load currents; this behavior makes obtained efficiency of both topologies in convergent levels when they operated to deliver small output current especially when working with higher switching frequencies. Larger duty-cycle can rise up the efficiency of both topologies.

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