Low Delay Based Full Adder/Subtractor by MIG and COG Reversible Logic Gate

2016 ◽  
Author(s):  
Jacob B. Chacko ◽  
Pawan Whig
Keyword(s):  
Logic Gate ◽  
Full Adder ◽  
Reversible Logic ◽  
Low Delay

scholarly journals Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder

1970 ◽  
Vol 32 (2) ◽  
Author(s):  
Md Saiful Islam ◽  
Zerina Begum
Keyword(s):  
Fault Tolerant ◽  
Logic Gate ◽  
Logic Synthesis ◽  
Digital Signal ◽  
Full Adder ◽  
Research Area ◽  
Reversible Logic ◽  
Hardware Complexity ◽  
Fundamental Building Block ◽  
Reversible Gate

Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts. Keywords: Reversible Logic, Parity Preserving Reversible Gate, IG Gate, FTFA and Carry Skip Logic. doi: 10.3329/jbas.v32i2.2431 Journal of Bangladesh Academy of Sciences Vol.32(2) 2008 234-250

scholarly journals From chemical soup to computing circuit: transforming a contiguous chemical medium into a logic gate network by modulating its external conditions

2019 ◽  
Vol 16 (158) ◽  
pp. 20190190
Author(s):  
Matthew Egbert ◽  
Jean-Sébastien Gagnon ◽  
Juan Pérez-Mercader
Keyword(s):  
Logic Gate ◽  
Reaction Diffusion ◽  
Logic Gates ◽  
Full Adder ◽  
Integrated Network ◽  
Lighting Conditions ◽  
Reaction Diffusion Model ◽  
Spatially Extended ◽  
External Conditions ◽  
Spatially Extended Systems

It has been shown that it is possible to transform a well-stirred chemical medium into a logic gate simply by varying the chemistry’s external conditions (feed rates, lighting conditions, etc.). We extend this work, showing that the same method can be generalized to spatially extended systems. We vary the external conditions of a well-known chemical medium (a cubic autocatalytic reaction–diffusion model), so that different regions of the simulated chemistry are operating under particular conditions at particular times. In so doing, we are able to transform the initially uniform chemistry, not just into a single logic gate, but into a functionally integrated network of diverse logic gates that operate as a basic computational circuit known as a full-adder.

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