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A low-power and area-efficient radix-3 SAR ADC
2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)
◽
10.1109/edssc.2015.7285071
◽
2015
◽
Author(s):
Yelaka Sunil Gavaskar Reddy
◽
Y. Y. H. Lam
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
Download Full-text
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Cited By
References
A low power area efficient 10-bit SAR ADC with parasitic insensitive capacitive DAC
2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS)
◽
10.1109/icmdcs.2017.8211571
◽
2017
◽
Author(s):
B Bibin Raj
◽
Devi Sreekumar
Keyword(s):
Low Power
◽
Sar Adc
◽
Capacitive Dac
◽
Area Efficient
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Design of Low Power, High Speed, Low Offset and Area Efficient Dynamic-Latch Comparator for SAR-ADC
2020 International Conference on Innovative Trends in Communication and Computer Engineering (ITCE)
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10.1109/itce48509.2020.9047792
◽
2020
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Author(s):
Kasi Bandla
◽
Harikrishnan A.
◽
Dipankar Pal
Keyword(s):
Low Power
◽
High Speed
◽
Sar Adc
◽
Low Offset
◽
Area Efficient
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Area-efficient low-power 8-bit 20-MS/s SAR ADC in 0.18μm CMOS
2014 29th International Conference on Microelectronics Proceedings - MIEL 2014
◽
10.1109/miel.2014.6842188
◽
2014
◽
Cited By ~ 3
Author(s):
E. Atkin
◽
D. Normanov
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
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A 10b 20MS/s SAR ADC with a low-power and area-efficient DAC-compensated reference
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
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10.1109/esscirc.2017.8094568
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2017
◽
Cited By ~ 4
Author(s):
Maoqiang Liu
◽
Arthur van Roermund
◽
Pieter Harpe
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
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A low-power area-efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems
10.1109/iembs.2009.5333068
◽
2009
◽
Cited By ~ 2
Author(s):
Sun-Il Chang
◽
Euisik Yoon
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
◽
Capacitor Arrays
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A Low-Power and Area-Efficient 14-bit SAR ADC with Hybrid CDAC for Array Sensors
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
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10.1109/iscas.2019.8702399
◽
2019
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Cited By ~ 1
Author(s):
Qihui Zhang
◽
Jing Li
◽
Zhong Zhang
◽
Kejun Wu
◽
Ning Ning
◽
...
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
Download Full-text
Realization of an ultra low power and area efficient SC SAR ADC architecture using single and two step reset methods
Microsystem Technologies
◽
10.1007/s00542-020-05118-8
◽
2021
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Author(s):
Pranati Ghoshal
◽
Chanchal Dey
◽
Sunit Kumar Sen
Keyword(s):
Low Power
◽
Sar Adc
◽
Ultra Low Power
◽
Area Efficient
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An ultra-low-power SAR ADC with an area-efficient DAC architecture
2011 IEEE International Symposium of Circuits and Systems (ISCAS)
◽
10.1109/iscas.2011.5937489
◽
2011
◽
Cited By ~ 15
Author(s):
Pouya Kamalinejad
◽
Shahriar Mirabbasi
◽
Victor C.M. Leung
Keyword(s):
Low Power
◽
Sar Adc
◽
Ultra Low Power
◽
Area Efficient
Download Full-text
Pre-charge solution for low-power, area-efficient SAR ADC
IEICE Electronics Express
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10.1587/elex.12.20150546
◽
2015
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Vol 12
(20)
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pp. 20150546-20150546
Author(s):
Sahar Sarafi
◽
Abu Khari Bin Aain
◽
Javad Abbaszadeh Bargoshadi
◽
Amin Chegini
Keyword(s):
Low Power
◽
Sar Adc
◽
Area Efficient
Download Full-text
Design of a high sensitivity and low power ultrasound receiver with a high-resolution SAR ADC for photoacoustic sensing and imaging
10.32657/10356/144400
◽
2020
◽
Author(s):
◽
Chuanshi Yang
Keyword(s):
High Resolution
◽
Low Power
◽
High Sensitivity
◽
Sar Adc
◽
Power Ultrasound
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