A novel digital loop filter with frequency error prediction for fast-locking bang-bang ADPLL

Author(s):  
Linqi Shi ◽  
Weixin Gai ◽  
Liangxiao Tang ◽  
Xiao Xiang
2021 ◽  
pp. 1-11
Author(s):  
Zhifeng Han ◽  
Zheng Fang

Abstract In traditional satellite navigation receivers, the parameters of tracking loop such as loop bandwidth and integration time are usually set in the design of the receivers according to different scenarios. The signal tracking performance is limited in traditional receivers. In addition, when the tracking ability of weak signals is improved by extending the integration time, negative effect of residual frequency error becomes more and more serious with extension of the integration time. To solve these problems, this paper presents out research on receiver tracking algorithms and proposes an optimised tracking algorithm with inertial information. The receiver loop filter is designed based on Kalman filter, reducing the phase jitter caused by thermal noise in the weak signal environment and improving the signal tracking sensitivity. To confirm the feasibility of the proposed algorithm, simulation tests are conducted.


2021 ◽  
Vol 13 (8) ◽  
pp. 1477
Author(s):  
Haotian Yang ◽  
Bin Zhou ◽  
Lixin Wang ◽  
Qi Wei ◽  
Feng Ji ◽  
...  

In the scenario of high dynamics and low C/N0, the discriminator output of a GNSS tracking loop is noisy and nonlinear. The traditional method uses a fixed-gain loop filter for error estimation, which is prone to lose lock and causes inaccurate navigation and positioning. This paper proposes a cascaded adaptive vector tracking method based on the KF+EKF architecture through the GNSS Software defined receiver in the signal tracking module and the navigation solution module. The linear relationships between the pseudo-range error and the code phase error, the pseudo-range rate error and the carrier frequency error are obtained as the measurement, and the navigation filter estimation is performed. The signal C/N0 ratio and innovation sequence are used to adjust the measurement noise covariance matrix and the process noise covariance matrix, respectively. Then, the estimated error value is used to correct the navigation parameters and fed back to the local code/carrier NCO. The field vehicle test results show that, in the case of sufficient satellite signals, the positioning error of the proposed method has a slight advantage compared with the traditional method. When there is signal occlusion or interference, the traditional method cannot achieve accurate positioning. However, the proposed method can maintain the same accuracy for the positioning results.


2020 ◽  
Vol 12 (17) ◽  
pp. 7048
Author(s):  
Aravind Chellachi Kathiresan ◽  
Jeyaraj PandiaRajan ◽  
Asokan Sivaprakash ◽  
Thanikanti Sudhakar Babu ◽  
Md. Rabiul Islam

Synchronization is a crucial problem in the grid-connected inverter’s control and operation. A phase-locked loop (PLL) is a typical grid synchronization strategy, which ought to have a high resistance to power system uncertainties since its sensitivity influences the generated reference signal. The traditional PLL catches the phase and frequency of the input signal via the feedback loop filter (LF). In general, to enhance the steady-state capability during distorted grid conditions generally, a filter tuned for nominal frequency is used. This PLL corrects large frequency deviations around the nominal frequency, which increases the PLL’s locking time. Therefore, this paper presents an adaptive feed-forward PLL, where the input signal frequency and phase under large frequency deviations are tracked precisely, which overcomes the above-mentioned limitations. The proposed adaptive PLL consists of a feedback loop that reduces the phase error. The feed-forward loop predicts the frequency and phase error, and the frequency adaptive FIR filter reduces the ripples in output, which is due to input distortions. The adaptive mechanism adjusts the gain of the filter in accordance with the supply frequency. This reduces the phase and frequency error and also decreases the locking time under wide frequency deviations. To verify the effectiveness of the proposed adaptive feed-forward PLL, the system was tested under different grid abnormal conditions. Further, the stability analysis has been carried out via a developed prototype test platform in the laboratory. To bring the proposed simulations into real-time implementations and for control strategies, an Altera Cyclone II field-programmable gate array (FPGA) board has been used. The obtained results of the proposed PLL via simulations and hardware are compared with conventional techniques, and it indicates the superiority of the proposed method. The proposed PLL effectively able to tackle the different grid uncertainties, which can be observed from the results presented in the result section.


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