scholarly journals An Adaptive Feed-Forward Phase Locked Loop for Grid Synchronization of Renewable Energy Systems under Wide Frequency Deviations

2020 ◽  
Vol 12 (17) ◽  
pp. 7048
Author(s):  
Aravind Chellachi Kathiresan ◽  
Jeyaraj PandiaRajan ◽  
Asokan Sivaprakash ◽  
Thanikanti Sudhakar Babu ◽  
Md. Rabiul Islam

Synchronization is a crucial problem in the grid-connected inverter’s control and operation. A phase-locked loop (PLL) is a typical grid synchronization strategy, which ought to have a high resistance to power system uncertainties since its sensitivity influences the generated reference signal. The traditional PLL catches the phase and frequency of the input signal via the feedback loop filter (LF). In general, to enhance the steady-state capability during distorted grid conditions generally, a filter tuned for nominal frequency is used. This PLL corrects large frequency deviations around the nominal frequency, which increases the PLL’s locking time. Therefore, this paper presents an adaptive feed-forward PLL, where the input signal frequency and phase under large frequency deviations are tracked precisely, which overcomes the above-mentioned limitations. The proposed adaptive PLL consists of a feedback loop that reduces the phase error. The feed-forward loop predicts the frequency and phase error, and the frequency adaptive FIR filter reduces the ripples in output, which is due to input distortions. The adaptive mechanism adjusts the gain of the filter in accordance with the supply frequency. This reduces the phase and frequency error and also decreases the locking time under wide frequency deviations. To verify the effectiveness of the proposed adaptive feed-forward PLL, the system was tested under different grid abnormal conditions. Further, the stability analysis has been carried out via a developed prototype test platform in the laboratory. To bring the proposed simulations into real-time implementations and for control strategies, an Altera Cyclone II field-programmable gate array (FPGA) board has been used. The obtained results of the proposed PLL via simulations and hardware are compared with conventional techniques, and it indicates the superiority of the proposed method. The proposed PLL effectively able to tackle the different grid uncertainties, which can be observed from the results presented in the result section.

2018 ◽  
Vol 7 (4.10) ◽  
pp. 81
Author(s):  
Prithiviraj R ◽  
Selvakumar J

Design of Phase Locked Loop (PLL) plays a vital role in transceiver field. Phase Locked Loop comprises of three blocks, namely Phase and frequency detector, loop filter and voltage-controlled oscillator. The greater advancements in CMOS technology such as high frequency, high speed, low noise and phase error leads to low-cost PLL This work aims to develop higher order non-linear models of general Phase Locked Loop. The condition of stability and choice of loop filter is also determined. Based on the analysis, the transfer function for PLL is determined.  


1994 ◽  
Vol 116 (4) ◽  
pp. 583-592 ◽  
Author(s):  
Tsu-Chin Tsao

This paper presents an approach for optimal digital feed-forward tracking controller design. The tracking problem is formulated as a model matching problem, in which the distance between a specified tracking reference model and the achievable tracking performance by feedforward compensation is minimized. Desired input/output characteristics, finite length preview action, tracking of specific classes of constrained signals, time domain reference signal velocity or acceleration bound, and frequency domain weighting are conveniently incorporated in the proposed controller design and their roles in tracking performance are discussed. The tracking error bound is also explicitly expressed in terms of the controller design parameters. An l1 norm optimal tracking controller is proposed as a solution to the mechanical tolerance control problem. A motion control example illustrates the design approach and several aspects of the resulting optimal feedforward controller, including the optimality of the zero phase error tracking controller.


2021 ◽  
Vol 13 (8) ◽  
pp. 1477
Author(s):  
Haotian Yang ◽  
Bin Zhou ◽  
Lixin Wang ◽  
Qi Wei ◽  
Feng Ji ◽  
...  

In the scenario of high dynamics and low C/N0, the discriminator output of a GNSS tracking loop is noisy and nonlinear. The traditional method uses a fixed-gain loop filter for error estimation, which is prone to lose lock and causes inaccurate navigation and positioning. This paper proposes a cascaded adaptive vector tracking method based on the KF+EKF architecture through the GNSS Software defined receiver in the signal tracking module and the navigation solution module. The linear relationships between the pseudo-range error and the code phase error, the pseudo-range rate error and the carrier frequency error are obtained as the measurement, and the navigation filter estimation is performed. The signal C/N0 ratio and innovation sequence are used to adjust the measurement noise covariance matrix and the process noise covariance matrix, respectively. Then, the estimated error value is used to correct the navigation parameters and fed back to the local code/carrier NCO. The field vehicle test results show that, in the case of sufficient satellite signals, the positioning error of the proposed method has a slight advantage compared with the traditional method. When there is signal occlusion or interference, the traditional method cannot achieve accurate positioning. However, the proposed method can maintain the same accuracy for the positioning results.


Author(s):  
Issam A. Smadi ◽  
Bayan H. Bany Fawaz

AbstractFast and accurate monitoring of the phase, amplitude, and frequency of the grid voltage is essential for single-phase grid-connected converters. The presence of DC offset in the grid voltage is detrimental to not only grid synchronization but also the closed-loop stability of the grid-connected converters. In this paper, a new synchronization method to mitigate the effect of DC offset is presented using arbitrarily delayed signal cancelation (ADSC) in a second-order generalized integrator (SOGI) phase-locked loop (PLL). A frequency-fixed SOGI-based PLL (FFSOGI-PLL) is adopted to ensure better stability and to reduce the complexity compared with other SOGI-based PLLs. A small-signal model of the proposed PLL is derived for the systematic design of proportional-integral (PI) controller gains. The effects of frequency variation and ADSC on the proposed PLL are considered, and correction methods are adopted to accurately estimate grid information. The simulation results are presented, along with comparisons to other single-phase PLLs in terms of settling time, peak frequency, and phase error to validate the proposed PLL. The dynamic performance of the proposed PLL is also experimentally validated. Overall, the proposed PLL has the fastest transient response and better dynamic performance than the other PLLs for almost all performance indices, offering an improved solution for precise grid synchronization in single-phase applications.


Author(s):  
Baoling Guo ◽  
Seddik Bacha ◽  
Mazen Alamir ◽  
Julien Pouget

AbstractAn extended state observer (ESO)-based loop filter is designed for the phase-locked loop (PLL) involved in a disturbed grid-connected converter (GcC). This ESO-based design enhances the performances and robustness of the PLL, and, therefore, improves control performances of the disturbed GcCs. Besides, the ESO-based LF can be applied to PLLs with extra filters for abnormal grid conditions. The unbalanced grid is particularly taken into account for the performance analysis. A tuning approach based on the well-designed PI controller is discussed, which results in a fair comparison with conventional PI-type PLLs. The frequency domain properties are quantitatively analysed with respect to the control stability and the noises rejection. The frequency domain analysis and simulation results suggest that the performances of the generated ESO-based controllers are comparable to those of the PI control at low frequency, while have better ability to attenuate high-frequency measurement noises. The phase margin decreases slightly, but remains acceptable. Finally, experimental tests are conducted with a hybrid power hardware-in-the-loop benchmark, in which balanced/unbalanced cases are both explored. The obtained results prove the effectiveness of ESO-based PLLs when applied to the disturbed GcC.


2015 ◽  
Vol 643 ◽  
pp. 109-116
Author(s):  
Daiki Oki ◽  
Satoru Kawauchi ◽  
Cong Bing Li ◽  
Masataka Kamiyama ◽  
Seiichi Banba ◽  
...  

This paper presents a power-efficient noise-canceling technique based on the feed-forward amplifiers, considering a fundamental tradeoff between noise figure (NF) and power consumption in the design of wide-band amplifiers. By suppressing the input signal of the noise cancellation amplifier, the nonlinear effect on the amplifier can be reduced, as well as the power consumption can be smaller. Furthermore, as a lower gain of the noise-canceling sub-amplifier can be achieved simultaneously, further reduction of the power consumption becomes possible. The verification of the proposed technique is conducted with Spectre simulation using 90nm CMOS process.


2018 ◽  
Vol 32 (34n36) ◽  
pp. 1840098
Author(s):  
Yuan Li ◽  
Huifang Shen ◽  
Chao Xiong ◽  
Yaofei Han ◽  
Guofeng He

In order to eliminate the effect on the grid current caused by the background harmonic voltage and the reference signal on the grid connected multi-inverter, this paper adopts the double closed-loop feed-forward control strategy. This strategy is based on the inductor voltage and the grid-connected current, and the integrated control strategy of quasi-proportional resonance loop parallel to a specific harmonic compensation loop. Based on the closed-loop model of multiple inverters, the change curves of the transfer function of the two control strategies are compared with the feed-forward control and the composite proportional resonance. The two corresponding control methods are used to analyze the current quality of the multi-inverter impact. Finally, the MATLAB/Simulink simulation model is set up to verify the proposed control strategies. The simulation results show that the proposed method can achieve better tracking of the sinusoidal command signal at the fundamental frequency, and enhance the anti-interference ability of the system at the 3rd, 5th, and 7th harmonic frequency.


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