scholarly journals The Effect of Stray Capacitance to the Common Mode Current on Three-Phase System

2021 ◽  
Author(s):  
Muhammad S. Alamsyah ◽  
Francinei L. Vieira ◽  
Heyno Garbe ◽  
Sebastian Koj
Keyword(s):  
Phase System ◽  
Stray Capacitance ◽  
Common Mode ◽  
Three Phase ◽  
The Common

A Simple Technique for Estimating the Winding Stray Capacitance of High-Frequency Three-Phase Common-Mode Inductors

2019 ◽  
Vol 139 (3) ◽  
pp. 339-347 ◽  
Author(s):  
Shotaro Takahashi ◽  
Satoshi Ogasawara ◽  
Masatsugu Takemoto ◽  
Koji Orikawa ◽  
Michio Tamate
Keyword(s):  
High Frequency ◽  
Simple Technique ◽  
Stray Capacitance ◽  
Common Mode ◽  
Three Phase

scholarly journals Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Electromagnetic Interference ◽  
Pulse Width Modulation ◽  
Motor Drives ◽  
Common Mode ◽  
Pwm Inverter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
The Common ◽  
Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

scholarly journals Space-vector modulation for three-phase indirect matrix converters to reduce common-mode voltage

2021 ◽  
Vol 4 (2) ◽  
pp. first
Author(s):  
Hoan Quoc Tran ◽  
Tien Manh Vu ◽  
Tuyen Dinh Nguyen
Keyword(s):  
Matrix Converter ◽  
Space Vector Modulation ◽  
Space Vector ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Output Performance ◽  
Three Phase ◽  
The Common ◽  
Vector Modulation ◽  
Zero Voltage

This paper presents a space vector modulation strategy for a three-phase indirect matrix converter to reduce the common-mode voltage and maintain the output performance. To reduce the peak value of the common-mode voltage to 57.7% of the input phase voltage, three active voltage vectors are used to generate the desired output voltage with arbitrary amplitude and frequency, instead of using both active and zero voltage vectors as in the traditional space vector modulation strategy. Although the common-mode voltage is reduced, the output waveform quality of the three-phase indirect matrix converter deteriorates due to the absence of the zero voltage vectors. To overcome this problem, the proposed space vector modulation strategy is redesigned to control the rectifier stage of the indirect matrix converter by utilizing three active current vectors instead of two as usual. Consequently, the constant average dc-link voltage is achieved, which can improve the output performance in terms of the output voltage and current harmonic distortion. The simulation is implemented by PSIM software and experimental results are provided to verify the effectiveness of the proposed space vector modulation strategy.

scholarly journals Three-Phase Transformerless Inverter for Photovoltaic Grid Connected System with Zero Common Mode Noise

2021 ◽  
Vol 19 ◽  
pp. 137-142
Author(s):  
K. Karam ◽  
◽  
M. Badawi El Najjar ◽  
M. El Hassan
Keyword(s):  
Leakage Current ◽  
Single Phase ◽  
Common Ground ◽  
Phase System ◽  
Common Mode ◽  
Overall Design ◽  
Modulation Technique ◽  
Pv Inverter ◽  
Three Phase ◽  
Major Factors

The pervasion of transformerless grid connected photovoltaic (PV) inverters has triggered the concerns of many researchers since it can induce power quality problems. In these types of applications, the generation of common mode (CM) leakage current is one of the major factors that affects the reliability of the overall design. In single-phase systems, the concept of the common ground between the PV negative terminal and the neutral point of the grid is the only topology that “totally” cancels this CM noise. However, none of the existing three-phase inverter techniques is able to totally remove it. Therefore, this paper proposes a three-phase PV inverter based on the concept applied in the single-phase system in order to achieve, for the first time, a zero CM noise in three-phase grid-connected PV applications. The proposed inverter is simulated with a PV array, appropriate modulation technique, corresponding inverter controller, and a three-phase Y-connected alternating current (AC) grid voltage. The simulation of the overall system is done using Matlab/Simulink software. As compared with results of existing three-phase topologies, this is the only three-phase transformerless PV inverter technique that offers generation of multilevel output, total elimination of leakage current flow, simple inverter structure, and uncomplicated modulation technique.

scholarly journals A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui
Keyword(s):  
Pulse Width Modulation ◽  
Neutral Point ◽  
Common Mode ◽  
Mapping Algorithm ◽  
Common Mode Voltage ◽  
Point Potential ◽  
Voltage Vector ◽  
Three Phase ◽  
Simulation And Experiment ◽  
The Common

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.

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