Improved Linearity Active Resistors Using MOS and Floating-Gate MOS Transistors

Author(s):  
Cosmin Popa
2020 ◽  
Vol 2 (7(76)) ◽  
pp. 26-28
Author(s):  
Oleg Grygoryevich Zhevnyak

Simulation of parasitic currents in Flash-memory cells based on short-channel MOSFET. In present paper the distributions of parasitic tunneling current as well as mean electron energy and mobility along the channel are calculated for short-channel MOSFETs by using Monte Carlo simulation of electron drift in such devices. The effect of drain bias in Flash-memory cells on these distributions is investigated for reading information regime. It is shown that the value of parasitic current is very small at considered conditions. But long storage can be change the charge in a floating gate of short-channel MOSFETs.


1992 ◽  
Vol 2 (1) ◽  
pp. 19-25 ◽  
Author(s):  
Han Yang ◽  
Bing J. Sheu ◽  
Ji-Chien Lee

1996 ◽  
Vol 9 (2) ◽  
pp. 167-179 ◽  
Author(s):  
Bradley A. Minch ◽  
Chris Diorio ◽  
Paul Hasler ◽  
Carver A. Mead

Sign in / Sign up

Export Citation Format

Share Document