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An area-efficient dynamically reconfigurable Spatial Division Multiplexing network-on-chip with static throughput guarantee
2010 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2010.5681443
◽
2010
◽
Cited By ~ 13
Author(s):
Zhiyao Joseph Yang
◽
Akash Kumar
◽
Yajun Ha
Keyword(s):
Network On Chip
◽
Dynamically Reconfigurable
◽
On Chip
◽
Spatial Division Multiplexing
◽
Area Efficient
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Cited By
References
Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip
7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)
◽
10.1109/recosoc.2012.6322894
◽
2012
◽
Cited By ~ 2
Author(s):
Anup Das
◽
Akash Kumar
◽
Bharadwaj Veeravalli
Keyword(s):
Fault Tolerant
◽
Network On Chip
◽
Network Interface
◽
On Chip
◽
Spatial Division Multiplexing
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Design Methodology of Dynamically Reconfigurable Network-on-Chip
Lecture Notes in Electrical Engineering - Communication Systems and Information Technology
◽
10.1007/978-3-642-21762-3_14
◽
2011
◽
pp. 111-116
Author(s):
Haiyun Gu
Keyword(s):
Design Methodology
◽
Network On Chip
◽
Dynamically Reconfigurable
◽
On Chip
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Area-Efficient Design of Scheduler for Routing Node of Network-On-Chip
International Journal of VLSI Design & Communication Systems
◽
10.5121/vlsic.2011.2309
◽
2011
◽
Vol 2
(3)
◽
pp. 111-118
◽
Cited By ~ 1
Author(s):
Rehan Maroofi
◽
Nitnaware
◽
Limaye
Keyword(s):
Network On Chip
◽
Efficient Design
◽
On Chip
◽
Area Efficient
Download Full-text
Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip
IEEE Transactions on Computers
◽
10.1109/tc.2018.2844365
◽
2018
◽
Vol 67
(12)
◽
pp. 1818-1834
◽
Cited By ~ 9
Author(s):
Weichen Liu
◽
Lei Yang
◽
Weiwen Jiang
◽
Liang Feng
◽
Nan Guan
◽
...
Keyword(s):
Network On Chip
◽
System On Chip
◽
Multiprocessor System
◽
Task Mapping
◽
Dynamically Reconfigurable
◽
On Chip
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An Low-Power Area-Efficient Routing Analysis and Optimization for a Fat Tree-Based Optical Network-on-Chip (ONoC) Architectures
Sensor Letters
◽
10.1166/sl.2018.4033
◽
2018
◽
Vol 16
(11)
◽
pp. 862-876
◽
Cited By ~ 4
Author(s):
R. Poovendran
◽
S. Sumathi
Keyword(s):
Low Power
◽
Optical Network
◽
Network On Chip
◽
On Chip
◽
Area Efficient
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An Area-Efficient FPGA Implementation of Network-on-Chip (NoC) Router Architecture for Optimized Multicore-SoC Communication
Sensor Letters
◽
10.1166/sl.2018.3985
◽
2018
◽
Vol 16
(7)
◽
pp. 552-560
◽
Cited By ~ 5
Author(s):
R. Poovendran
◽
S. Sumathi
Keyword(s):
Network On Chip
◽
Fpga Implementation
◽
Router Architecture
◽
On Chip
◽
Area Efficient
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Power and Area Efficient Design of Network-on-Chip Router through Utilization of Idle Buffers
2010 17th IEEE International Conference and Workshops on Engineering of Computer Based Systems
◽
10.1109/ecbs.2010.21
◽
2010
◽
Cited By ~ 8
Author(s):
Khalid Latif
◽
Tiberiu Seceleanu
◽
Hannu Tenhunen
Keyword(s):
Network On Chip
◽
Efficient Design
◽
On Chip
◽
Area Efficient
Download Full-text
A high-performance, low-area reconfiguration controller for network-on-chip-based partial dynamically reconfigurable system-on-chip designs
International Journal of Electronics
◽
10.1080/00207217.2010.512019
◽
2010
◽
Vol 97
(10)
◽
pp. 1207-1225
◽
Cited By ~ 2
Author(s):
Ling Wang
◽
Chunda Ding
◽
Dongxin Wen
◽
Yingtao Jiang
Keyword(s):
High Performance
◽
Network On Chip
◽
System On Chip
◽
Dynamically Reconfigurable
◽
Low Area
◽
Reconfigurable System
◽
On Chip
◽
Reconfiguration Controller
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FPGA based design of area efficient router architecture for Network on Chip (NoC)
2016 International Conference on Computing, Communication and Automation (ICCCA)
◽
10.1109/ccaa.2016.7813980
◽
2016
◽
Author(s):
Mayank Kumar
◽
Kishore Kumar
◽
Sanjiv Kumar Gupta
◽
Yogendera Kumar
Keyword(s):
Network On Chip
◽
Router Architecture
◽
On Chip
◽
Area Efficient
Download Full-text
A light-weight Network-on-Chip architecture for dynamically reconfigurable systems
2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation
◽
10.1109/icsamos.2008.4664846
◽
2008
◽
Cited By ~ 4
Author(s):
Simone Corbetta
◽
Vincenzo Rana
◽
Marco Domenico Santambrogio
◽
Donatella Sciuto
Keyword(s):
Network On Chip
◽
Reconfigurable Systems
◽
Light Weight
◽
Dynamically Reconfigurable
◽
On Chip
Download Full-text
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