Advanced automatic test pattern generation techniques for path delay faults

[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers ◽

10.1109/ftcs.1989.105541 ◽

2003 ◽

Author(s):

M.H. Schulz ◽

K. Fuchs ◽

F. Fink

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Download Full-text

DYNAMITE: an efficient automatic test pattern generation system for path delay faults

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.88928 ◽

1991 ◽

Vol 10 (10) ◽

pp. 1323-1335 ◽

Author(s):

K. Fuchs ◽

F. Fink ◽

M.H. Schulz

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Generation System ◽

Download Full-text

Fast test pattern generation for all path delay faults considering various test classes

Proceedings ETC 93 Third European Test Conference ◽

10.1109/etc.1993.246529 ◽

2002 ◽

Author(s):

K. Fuchs ◽

H.C. Wittmann ◽

K.J. Antreich

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults

Download Full-text

Bit parallel test pattern generation for path delay faults

Proceedings the European Design and Test Conference. ED&TC 1995 ◽

10.1109/edtc.1995.470351 ◽

2002 ◽

Author(s):

M. Henftling ◽

H. Wittman

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Download Full-text

Scalable Compact Test Pattern Generation for Path Delay Faults Based on Functions

2009 27th IEEE VLSI Test Symposium ◽

10.1109/vts.2009.22 ◽

2009 ◽

Author(s):

Edward Flanigan ◽

Spyros Tragoudas ◽

Arkan Abdulrahman

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Download Full-text

RESIST: a recursive test pattern generation algorithm for path delay faults considering various test classes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.331411 ◽

1994 ◽

Vol 13 (12) ◽

pp. 1550-1562 ◽

Author(s):

K. Fuchs ◽

M. Pabst ◽

T. Rossel

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Generation Algorithm

Download Full-text

Test pattern generation for path delay faults in synchronous sequential circuits using multiple fast clocks and multiple observation times

Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing ◽

10.1109/ftcs.1994.315617 ◽

2002 ◽

Author(s):

P. Uppaluri ◽

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Synchronous Sequential Circuits ◽

Observation Times

Download Full-text

Function-based compact test pattern generation for path delay faults

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2005.853607 ◽

2005 ◽

Vol 13 (8) ◽

pp. 996-1001 ◽

Author(s):

M.K. Michael ◽

S. Tragoudas

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Download Full-text

An automatic test pattern generation framework for combinational threshold logic networks

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. ◽

10.1109/iccd.2004.1347974 ◽

2004 ◽

Author(s):

P. Gupta ◽

Rui Zhang ◽

N.K. Jha

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Threshold Logic ◽

Download Full-text

Automatic test pattern generation can be solved as a constraint satisfaction problem

Microprocessing and Microprogramming ◽

10.1016/0165-6074(93)90216-8 ◽

1993 ◽

Vol 38 (1-5) ◽

pp. 715-722

Author(s):

K. Tilly ◽

L. Surján ◽

G. Román

Keyword(s):

Constraint Satisfaction ◽

Test Pattern ◽

Constraint Satisfaction Problem ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Download Full-text

Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits

Reversible Computation - Lecture Notes in Computer Science ◽

10.1007/978-3-319-59936-6_14 ◽

2017 ◽

pp. 176-182 ◽

Author(s):

Anmol Prakash Surhonne ◽

Anupam Chattopadhyay ◽

Robert Wille

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Automatic Test ◽

Reversible Circuits

Download Full-text