Designing of Multiplexer and De-Multiplexer Using Different Adiabatic Logic in 90nm Technology

2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT) ◽

10.1109/icccnt.2018.8494170 ◽

2018 ◽

Cited By ~ 1

Author(s):

Deepak Mittal ◽

Amit Niranjan

Keyword(s):

Adiabatic Logic

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AN ENERGY-EFFICIENT ADIABATIC LOGIC BASED LFSR

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.7.2.16421 ◽

2019 ◽

Vol 7 (2) ◽

pp. 1

Author(s):

M. K. SAINI ◽

N. PANDEY ◽

NITISH ◽

◽

...

Keyword(s):

Energy Efficient ◽

Adiabatic Logic

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Evolutionary Approach of Adiabatic Logic Design on Low Power Solution �A Robust Survey

i-manager s Journal on Communication Engineering and Systems ◽

10.26634/jcs.1.2.1775 ◽

2012 ◽

Vol 1 (2) ◽

pp. 36-49

Author(s):

A. Kishore Kumar ◽

D. Somasundareswari ◽

V. Duraisamy ◽

T. Shunbaga Pradeepa

Keyword(s):

Low Power ◽

Evolutionary Approach ◽

Logic Design ◽

Adiabatic Logic

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Ultralow-Power and Secure S-Box Circuit Using FinFET Based ECRL Adiabatic Logic

Journal of Science and Technology ◽

10.30880/jst.2018.10.03.003 ◽

2018 ◽

Vol 10 (3) ◽

Author(s):

K. Srilakshmi ◽

◽

A. V. N. Tilak ◽

K. Srinivasa Rao ◽

◽

...

Keyword(s):

Adiabatic Logic ◽

Ultralow Power

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Designs and Implementations of Energy-Efficient Single-Phase Clock Pass Transistor Adiabatic Logic Circuits

Recent Patents on Electrical & Electronic Engineering e ◽

10.2174/22131116113066660009 ◽

2013 ◽

Vol 6 (3) ◽

pp. 173-182

Author(s):

Yanfei Zhang ◽

Jianping Hu

Keyword(s):

Energy Efficient ◽

Single Phase ◽

Logic Circuits ◽

Adiabatic Logic ◽

Pass Transistor ◽

Phase Clock

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Performance Analysis of 2N-N-2P Adiabatic Logic Circuits for Low Power Applications using FinFET

Procedia Computer Science ◽

10.1016/j.procs.2017.09.122 ◽

2017 ◽

Vol 115 ◽

pp. 166-173 ◽

Cited By ~ 3

Author(s):

B.P. Bhuvana ◽

V.S. Kanchana Bhaaskaran

Keyword(s):

Performance Analysis ◽

Low Power ◽

Logic Circuits ◽

Adiabatic Logic

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Optimization of power and energy in FinFET based SRAM cell using adiabatic logic

2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2) ◽

10.1109/icnets2.2017.8067966 ◽

2017 ◽

Cited By ~ 2

Author(s):

Sudarshan Patil ◽

V.S. Kanchana Bhaaskaran

Keyword(s):

Sram Cell ◽

Adiabatic Logic ◽

Power And Energy

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Efficient power clock generation for adiabatic logic

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) ◽

10.1109/iscas.2001.922319 ◽

2002 ◽

Cited By ~ 14

Author(s):

H. Mahmoodi-Meimand ◽

A. Afzali-Kusha

Keyword(s):

Clock Generation ◽

Adiabatic Logic ◽

Efficient Power

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A Clocked Transmission-Gate Boot-Strapping Adiabatic Logic

International Journal of Simulation Systems Science & Technology ◽

10.5013/ijssst.a.17.45.52 ◽

2016 ◽

Author(s):

Guest Editor Jianping Du

Keyword(s):

Transmission Gate ◽

Adiabatic Logic ◽

Boot Strapping

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Implementation of barrel shifter using diode free adiabatic logic (DFAL)

2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE) ◽

10.1109/icgccee.2014.6922301 ◽

2014 ◽

Cited By ~ 1

Author(s):

K. Srinivasarao ◽

Gagnesh Kumar

Keyword(s):

Adiabatic Logic ◽

Barrel Shifter

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Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications

2007 IEEE International SOC Conference ◽

10.1109/socc.2007.4545468 ◽

2007 ◽

Cited By ~ 1

Author(s):

Cihun-Siyong Alex Gong ◽

Muh-Tian Shiue ◽

Ci-Tong Hong ◽

Chun-Hsien Su ◽

Kai-Wen Yao

Keyword(s):

Power System ◽

Low Power ◽

Complementary Energy ◽

Analysis And Design ◽

Adiabatic Logic ◽

Low Power System

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