A combination of wave-pipelining timing methodology and DPTL circuit design technique
2014 ◽
Vol 134
(5)
◽
pp. 283-283
2012 ◽
Vol 27
◽
pp. 85-97
◽
2005 ◽
Vol 40
(6)
◽
pp. 1288-1295
◽
Keyword(s):
Keyword(s):