Design of a Low-Power 8 x 8-Bit Parallel Multiplier Using MOS Current Mode Logic Circuit

Author(s):  
Youn Lee ◽  
Jeong Kim
2007 ◽  
Vol 43 (17) ◽  
pp. 911 ◽  
Author(s):  
A. Tajalli ◽  
E. Vittoz ◽  
Y. Leblebici ◽  
E.J. Brauer

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