A conduction model for intrinsic polycrystalline silicon thin-film transistor based on energy-dispersed trap states at discrete grain boundary

2008 ◽  
Author(s):  
Man Wong ◽  
Thomas Chow ◽  
Chun Cheong Wong ◽  
Dongli Zhang
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Polycrystalline Silicon ◽  
Thin Film Transistor ◽  
Trap States ◽  
Silicon Thin Film ◽  
Conduction Model

Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location

2001 ◽  
Vol 89 (1) ◽  
pp. 596-600 ◽  
Author(s):  
Mutsumi Kimura ◽  
Satoshi Inoue ◽  
Tatsuya Shimoda ◽  
Tsukasa Eguchi
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Polycrystalline Silicon ◽  
Thin Film Transistor ◽  
Silicon Thin Film ◽  
Boundary Location

Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary in Polycrystalline Silicon Thin-Film Transistors

2001 ◽  
Vol 40 (Part 1, No. 1) ◽  
pp. 112-113 ◽  
Author(s):  
Mutsumi Kimura ◽  
Ryoichi Nozawa ◽  
Satoshi Inoue ◽  
Tatsuya Shimoda ◽  
Basil On-Kit Lui ◽  
...  
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Trap States ◽  
Silicon Thin Film ◽  
Silicon Interface

Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary for Polycrystalline Silicon Thin-Film Transistors

2001 ◽  
Vol 40 (Part 1, No. 9A) ◽  
pp. 5227-5236 ◽  
Author(s):  
Mutsumi Kimura ◽  
Ryoichi Nozawa ◽  
Satoshi Inoue ◽  
Tatsuya Shimoda ◽  
Basil On-Kit Lui ◽  
...  
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Trap States ◽  
Silicon Thin Film ◽  
Silicon Interface
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