Recovery of negative and positive bias temperature stress in pMOSFETs

2010 ◽  
Author(s):  
Ph. Hehenberger ◽  
H. Reisinger ◽  
T. Grasser
Keyword(s):  
Temperature Stress ◽  
Positive Bias ◽  
Bias Temperature Stress

Hydrogen as a Cause of Abnormal Subchannel Formation Under Positive Bias Temperature Stress in a-InGaZnO Thin-Film Transistors

2019 ◽  
Vol 66 (7) ◽  
pp. 2954-2959
Author(s):  
Yu-Chieh Chien ◽  
Yi-Chieh Yang ◽  
Yu-Ching Tsao ◽  
Hsiao-Cheng Chiang ◽  
Mao-Chou Tai ◽  
...  
Keyword(s):  
Thin Film ◽  
Temperature Stress ◽  
Thin Film Transistors ◽  
Positive Bias ◽  
Bias Temperature Stress

Interface state generation under long-term positive-bias temperature stress for a p/sup +/ poly gate MOS structure

1989 ◽  
Vol 36 (9) ◽  
pp. 1732-1739 ◽  
Author(s):  
Y. Hiruta ◽  
H. Iwai ◽  
F. Matsuoka ◽  
K. Hama ◽  
K. Maeguchi ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Interface State ◽  
Positive Bias ◽  
Mos Structure ◽  
State Generation ◽  
Bias Temperature Stress

scholarly journals Impact of Hot Carrier Degradation and Positive Bias Temperature Stress on Lateral 4H-SiC nMOSFETs

2014 ◽  
Vol 778-780 ◽  
pp. 959-962 ◽  
Author(s):  
Gregor Pobegen ◽  
Thomas Aichinger ◽  
Alberto Salinaro ◽  
Tibor Grasser
Keyword(s):  
Temperature Stress ◽  
Interface Traps ◽  
Positive Bias ◽  
Limited Information ◽  
Degradation Mechanisms ◽  
Hot Carrier ◽  
Bias Temperature Stress ◽  
Silicon Based ◽  
Induced Defects ◽  
The Impact

We study the impact of positive bias temperature stress and hot carrier stress on lateral 4H-SiC nMOSFETs. These degradation mechanisms are prominent in silicon based devices where both create oxide as well as interface traps. For SiC MOSFETs only limited information regarding these mechanisms is available. We transfer the charge pumping technique, known from Si MOSFETs, reliably to SiC MOSFETs to learn about the nature of the stress induced defects.

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