A Vacancy-Interstitial Defect Pair Model for Positive-Bias Temperature Stress-Induced Electron Trapping Transformation in the High- $\kappa $ Gate n-MOSFET

IEEE Transactions on Electron Devices ◽

10.1109/ted.2017.2694440 ◽

2017 ◽

Vol 64 (6) ◽

pp. 2505-2511 ◽

Author(s):

Chenjie Gu ◽

Diing Shenp Ang ◽

Yuan Gao ◽

Renyuan Gu ◽

Ziqi Zhao ◽

...

Keyword(s):

Temperature Stress ◽

Electron Trapping ◽

Positive Bias ◽

Defect Pair ◽

Interstitial Defect ◽

Bias Temperature Stress

Download Full-text

Hydrogen as a Cause of Abnormal Subchannel Formation Under Positive Bias Temperature Stress in a-InGaZnO Thin-Film Transistors

IEEE Transactions on Electron Devices ◽

10.1109/ted.2019.2913708 ◽

2019 ◽

Vol 66 (7) ◽

pp. 2954-2959

Author(s):

Yu-Chieh Chien ◽

Yi-Chieh Yang ◽

Yu-Ching Tsao ◽

Hsiao-Cheng Chiang ◽

Mao-Chou Tai ◽

...

Keyword(s):

Thin Film ◽

Temperature Stress ◽

Thin Film Transistors ◽

Positive Bias ◽

Bias Temperature Stress

Download Full-text

Recovery of negative and positive bias temperature stress in pMOSFETs

2010 IEEE International Integrated Reliability Workshop Final Report ◽

10.1109/iirw.2010.5706473 ◽

2010 ◽

Author(s):

Ph. Hehenberger ◽

H. Reisinger ◽

T. Grasser

Keyword(s):

Temperature Stress ◽

Positive Bias ◽

Bias Temperature Stress

Download Full-text

Interface state generation under long-term positive-bias temperature stress for a p/sup +/ poly gate MOS structure

IEEE Transactions on Electron Devices ◽

10.1109/16.34236 ◽

1989 ◽

Vol 36 (9) ◽

pp. 1732-1739 ◽

Author(s):

Y. Hiruta ◽

H. Iwai ◽

F. Matsuoka ◽

K. Hama ◽

K. Maeguchi ◽

...

Keyword(s):

Temperature Stress ◽

Interface State ◽

Positive Bias ◽

Mos Structure ◽

State Generation ◽

Bias Temperature Stress

Download Full-text

Publisher's Note: “Effect of interfacial excess oxygen on positive-bias temperature stress instability of self-aligned coplanar InGaZnO thin-film transistors” [Appl. Phys. Lett. 108, 141604 (2016)]

Applied Physics Letters ◽

10.1063/1.4947573 ◽

2016 ◽

Vol 108 (16) ◽

pp. 169903 ◽

Author(s):

Saeroonter Oh ◽

Ju Heyuck Baeck ◽

Jong Uk Bae ◽

Kwon-Shik Park ◽

In Byeong Kang

Keyword(s):

Thin Film ◽

Temperature Stress ◽

Thin Film Transistors ◽

Excess Oxygen ◽

Positive Bias ◽

Bias Temperature Stress

Download Full-text

Temperature dependence of the emission and capture times of SiON individual traps after positive bias temperature stress

Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena ◽

10.1116/1.3532947 ◽

2011 ◽

Vol 29 (1) ◽

pp. 01AA04 ◽

Author(s):

M. Toledano-Luque ◽

B. Kaczer ◽

Ph. Roussel ◽

M. J. Cho ◽

T. Grasser ◽

...

Keyword(s):

Temperature Dependence ◽

Temperature Stress ◽

Positive Bias ◽

Bias Temperature Stress

Download Full-text

Investigation of microwave assisted annealing on AP-PECVD fabricated In-Ga-Zn-O thin film transistors under positive bias temperature stress

2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO) ◽

10.1109/nano.2016.7751474 ◽

2016 ◽

Author(s):

Chien-Hung Wu ◽

Bo-Wen Huang ◽

Kow-Ming Chang ◽

Chia-Yao Cheng ◽

Hsin-Ying Chen ◽

...

Keyword(s):

Thin Film ◽

Temperature Stress ◽

Thin Film Transistors ◽

Positive Bias ◽

Microwave Assisted ◽

Bias Temperature Stress

Download Full-text

Leakage current conduction, hole injection, and time-dependent dielectric breakdown ofn-4H-SiC MOS capacitors during positive bias temperature stress

Journal of Applied Physics ◽

10.1063/1.4973674 ◽

2017 ◽

Vol 121 (3) ◽

pp. 034501 ◽

Author(s):

Piyas Samanta ◽

Krishna C. Mandal

Keyword(s):

Leakage Current ◽

Temperature Stress ◽

Dielectric Breakdown ◽

Time Dependent ◽

Hole Injection ◽

Positive Bias ◽

Mos Capacitors ◽

Time Dependent Dielectric Breakdown ◽

Current Conduction ◽

Bias Temperature Stress

Download Full-text

A Two-Stage Degradation Model of p-Channel Low-Temperature Poly-Si Thin-Film Transistors Under Positive Bias Temperature Stress

IEEE Transactions on Electron Devices ◽

10.1109/ted.2011.2160949 ◽

2011 ◽

Vol 58 (10) ◽

pp. 3501-3505 ◽

Author(s):

Xiaowei Lu ◽

Mingxiang Wang ◽

Man Wong

Keyword(s):

Thin Film ◽

Low Temperature ◽

Temperature Stress ◽

Thin Film Transistors ◽

Positive Bias ◽

Two Stage ◽

Degradation Model ◽

Bias Temperature Stress ◽

Download Full-text

Effects of Ambient Atmosphere on Electrical Characteristics of Al2O3 Passivated InGaZnO Thin Film Transistors during Positive-Bias-Temperature-Stress Operation

Electrochemical and Solid-State Letters ◽

10.1149/1.3534828 ◽

2011 ◽

Vol 14 (4) ◽

pp. H177 ◽

Author(s):

Sheng-Yao Huang ◽

Ting-Chang Chang ◽

Min-Chen Chen ◽

Shih-Ching Chen ◽

Chih-Tsung Tsai ◽

...

Keyword(s):

Thin Film ◽

Temperature Stress ◽

Thin Film Transistors ◽

Ambient Atmosphere ◽

Positive Bias ◽

Electrical Characteristics ◽

Bias Temperature Stress

Download Full-text

Impact of Hot Carrier Degradation and Positive Bias Temperature Stress on Lateral 4H-SiC nMOSFETs

Materials Science Forum ◽

10.4028/www.scientific.net/msf.778-780.959 ◽

2014 ◽

Vol 778-780 ◽

pp. 959-962 ◽

Author(s):

Gregor Pobegen ◽

Thomas Aichinger ◽

Alberto Salinaro ◽

Tibor Grasser

Keyword(s):

Temperature Stress ◽

Interface Traps ◽

Positive Bias ◽

Limited Information ◽

Degradation Mechanisms ◽

Hot Carrier ◽

Bias Temperature Stress ◽

Silicon Based ◽

Induced Defects ◽

We study the impact of positive bias temperature stress and hot carrier stress on lateral 4H-SiC nMOSFETs. These degradation mechanisms are prominent in silicon based devices where both create oxide as well as interface traps. For SiC MOSFETs only limited information regarding these mechanisms is available. We transfer the charge pumping technique, known from Si MOSFETs, reliably to SiC MOSFETs to learn about the nature of the stress induced defects.

Download Full-text