Very high speed real-time IIR digital filter structures: suitable for VLSI implementation

2002 ◽  
Author(s):  
K.K. Dhar
Keyword(s):  
Real Time ◽  
Digital Filter ◽  
High Speed ◽  
Vlsi Implementation ◽  
Filter Structures ◽  
Very High

HIGH-SPEED PARALLEL VLSI ARCHITECTURES FOR IMAGE DECORRELATION

1995 ◽  
Vol 09 (02) ◽  
pp. 343-365
Author(s):  
TINKU ACHARYA ◽  
AMAR MUKHERJEE
Keyword(s):  
Image Compression ◽  
Real Time ◽  
High Speed ◽  
State Of The Art ◽  
Parallel Architecture ◽  
Vlsi Implementation ◽  
Compression Rate ◽  
Vlsi Architectures ◽  
Vlsi Chip ◽  
Vlsi Technology

We present a new high speed parallel architecture and its VLSI implementation to design a special purpose hardware for real-time lossless image compression/ decompression using a decorrelation scheme. The proposed architecture can easily be implemented using state-of-the-art VLSI technology. The hardware yields a high compression rate. A prototype 1-micron VLSI chip based on this architectural idea has been designed. The scheme is favourably comparable to the lossless JPEG standard image compression schemes. We also discuss the parallelization issues of the lossless JPEG standard still compression schemes and their difficulties.

scholarly journals GA Processor Architecture for Real-Time GA Processing and VLSI Implementation for High-Speed PE

2004 ◽  
Vol 8 (4) ◽  
pp. 323-334
Author(s):  
Tetsuya Imai ◽  
Masaya Yoshikawa ◽  
Hidekazu Terai ◽  
Tomohiro Fujita ◽  
Hironori Yamauchi
Keyword(s):  
Real Time ◽  
High Speed ◽  
Vlsi Implementation ◽  
Processor Architecture
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