New cellular array for the hardware implementation of very high speed digital filter

Author(s):  
D.S. Dawoud
Fractals ◽  
2018 ◽  
Vol 26 (03) ◽  
pp. 1850023 ◽  
Author(s):  
D. PACHECO BAUTISTA ◽  
R. CARREÑO AGUILERA ◽  
E. CORTÉS PÉREZ ◽  
M. GONZÁLEZ PÉREZ ◽  
J. J. MEDEL ◽  
...  

An innovative reconfiguration application is proposed to re-calculate the parameters of the Ferragina and Manzini exact search algorithm (or FM indexes), using a modular and efficient hardware implementation to accelerate alignment programs of short DNA sequence reads. Although these programs use multi-core execution strategies or multiple computers, they have become slow considering the very high speed at which the new massively parallel sequencing machines produce the reads to be aligned. Consequently, a search for different ways to accelerate the alignment is crucial. The proposed design runs with software functions in a hybrid system, and has the ability to align millions of reads to reference as large as the human genome. Tests on the M505k325t card show that a single alignment core can accelerate the computation by a factor close to [Formula: see text] in relation to BWA. Due to the minor consumption of area and power, multiple alignment cores can fill the Field Programmable Gate Array (FPGA) by multiplying the computation speed. With a multiple-core implementation, the processing speed of the design outperforms applications that are accelerated by GPUs and competes with similar FPGA proposals whose cost is much higher.


2012 ◽  
Vol 433-440 ◽  
pp. 4571-4577
Author(s):  
Guo Sheng Xu

To realize filtering of high-speed input data, and aiming at the design method of systolic FIR digital filter, this paper proposes a design method of high-speed FIR filter based on FPGA. The states conversion between coefficients configuring mode and filtering mode is finished by FSM (Finite State Machine), which ensures the system to work orderly. The experimental results demonstrated, it can reduce the input dimension and eliminate linear and nonlinear interference effectively. In addition, it is very suitable for hardware implementation due to its simple structure.


Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.


Alloy Digest ◽  
2019 ◽  
Vol 68 (10) ◽  

Abstract YSS HAP72 is a powder metallurgy high-speed tool steel with a very high wear resistance. This datasheet provides information on composition, hardness, and bend strength. It also includes information on high temperature performance. Filing Code: TS-779. Producer or source: Hitachi Metals America Ltd.


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