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A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
Proceedings 31st IEEE International Symposium on Multiple-Valued Logic
◽
10.1109/ismvl.2001.924559
◽
2002
◽
Cited By ~ 7
Author(s):
T. Uemura
◽
T. Baba
Keyword(s):
Shift Register
◽
Flip Flop
◽
Tunnel Transistors
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Cited By
References
A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
IEEE Transactions on Electron Devices
◽
10.1109/ted.2002.801431
◽
2002
◽
Vol 49
(8)
◽
pp. 1336-1340
◽
Cited By ~ 15
Author(s):
T. Uemura
◽
T. Baba
Keyword(s):
Shift Register
◽
Flip Flop
◽
Tunnel Transistors
Download Full-text
Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
◽
10.1587/transfun.e94.a.2669
◽
2011
◽
Vol E94-A
(12)
◽
pp. 2669-2675
◽
Cited By ~ 4
Author(s):
Chikara HAMANAKA
◽
Ryosuke YAMAMOTO
◽
Jun FURUTA
◽
Kanto KUBOTA
◽
Kazutoshi KOBAYASHI
◽
...
Keyword(s):
Shift Register
◽
Flip Flop
◽
Variation Tolerance
◽
Modular Redundancy
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Design of Area Efficient Shift Register and Scan Flip-Flop based on QCA Technology
2021 International Conference on Emerging Smart Computing and Informatics (ESCI)
◽
10.1109/esci50559.2021.9396977
◽
2021
◽
Author(s):
D. Ajitha
◽
Suhaib Ahmed
◽
Firdous Ahmad
◽
G. K. Rajini
Keyword(s):
Shift Register
◽
Flip Flop
◽
Area Efficient
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Butterfly interconnection network: design of multiplier, flip-flop, and shift register
Applied Optics
◽
10.1364/ao.33.001457
◽
1994
◽
Vol 33
(8)
◽
pp. 1457
◽
Cited By ~ 5
Author(s):
Khan M. Iftekharuddin
◽
Mohammad A. Karim
Keyword(s):
Network Design
◽
Interconnection Network
◽
Shift Register
◽
Flip Flop
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Low Power High-Efficiency Shift Register Using Implicit Pulse-Triggered Flip-Flop in 130 nm CMOS Process for a Cryptographic RFID Tag
Electronics
◽
10.3390/electronics5040092
◽
2016
◽
Vol 5
(4)
◽
pp. 92
◽
Cited By ~ 1
Author(s):
Mohammad Badal
◽
Mamun Reaz
◽
Zinah Jalil
◽
Mohammad Bhuiyan
Keyword(s):
Low Power
◽
High Efficiency
◽
Shift Register
◽
Cmos Process
◽
Flip Flop
◽
Rfid Tag
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Design a low current and high speed shift register based on D type flip flop
2015 Forth International Conference on e-Technologies and Networks for Development (ICeND)
◽
10.1109/icend.2015.7328542
◽
2015
◽
Cited By ~ 1
Author(s):
S. Ehsan Razavi
◽
Javad Royaei
◽
Mehdi Bahadorzadeh
Keyword(s):
High Speed
◽
Shift Register
◽
Flip Flop
Download Full-text
Optical shift register based on an optical flip-flop memory with a single active element
31st European Conference on Optical Communications (ECOC 2005)
◽
10.1049/cp:20050458
◽
2005
◽
Cited By ~ 4
Author(s):
S. Zhang
Keyword(s):
Active Element
◽
Shift Register
◽
Flip Flop
Download Full-text
Shift register design using two bit flip-flop
2014 Recent Advances in Engineering and Computational Sciences (RAECS)
◽
10.1109/raecs.2014.6799555
◽
2014
◽
Cited By ~ 3
Author(s):
Shefali Sharma
◽
Bipan Kaushal
Keyword(s):
Shift Register
◽
Flip Flop
◽
Bit Flip
Download Full-text
Design of efficient N‐bit shift register using optimized D flip flop in quantum dot cellular automata technology
IET Quantum Communication
◽
10.1049/qtc2.12008
◽
2021
◽
Author(s):
Salma Yaqoob
◽
Suhaib Ahmed
◽
Syed Farah Naz
◽
Sadaf Bashir
◽
Sparsh Sharma
Keyword(s):
Cellular Automata
◽
Quantum Dot
◽
Shift Register
◽
Flip Flop
◽
Quantum Dot Cellular Automata
Download Full-text
Low power D flip-flop serial in/parallel out based shift register
2016 International Conference on Advances in Electrical, Electronic and Systems Engineering (ICAEES)
◽
10.1109/icaees.2016.7888034
◽
2016
◽
Cited By ~ 1
Author(s):
Mohammad Arif Sobhan Bhuiyan
◽
Arvin Mahmoudbeik
◽
Torikul Islam Badal
◽
Mamun Bin Ibne Reaz
◽
Labonnah F. Rahman
Keyword(s):
Low Power
◽
Shift Register
◽
Flip Flop
Download Full-text
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