A Novel Evolutionary Technique for Multi-objective Power, Area and Delay Optimization in High Level Synthesis of Datapaths

Author(s):  
D.S. Harish Ram ◽  
M.C. Bhuvaneswari ◽  
S.M. Logesh
VLSI Design ◽  
2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
D. S. Harish Ram ◽  
M. C. Bhuvaneswari ◽  
Shanthi S. Prabhu

High-Level Synthesis deals with the translation of algorithmic descriptions into an RTL implementation. It is highly multi-objective in nature, necessitating trade-offs between mutually conflicting objectives such as area, power and delay. Thus design space exploration is integral to the High Level Synthesis process for early assessment of the impact of these trade-offs. We propose a methodology for multi-objective optimization of Area, Power and Delay during High Level Synthesis of data paths from Data Flow Graphs (DFGs). The technique performs scheduling and allocation of functional units and registers concurrently. A novel metric based technique is incorporated into the algorithm to estimate the likelihood of a schedule to yield low-power solutions. A true multi-objective evolutionary technique, “Nondominated Sorting Genetic Algorithm II” (NSGA II) is used in this work. Results on standard DFG benchmarks indicate that the NSGA II based approach is much faster than a weighted sum GA approach. It also yields superior solutions in terms of diversity and closeness to the true Pareto front. In addition a framework for applying another evolutionary technique: Weighted Sum Particle Swarm Optimization (WSPSO) is also reported. It is observed that compared to WSGA, WSPSO shows considerable improvement in execution time with comparable solution quality.


Author(s):  
Christian Pilato ◽  
Gianluca Palermo ◽  
Antonino Tumeo ◽  
Fabrizio Ferrandi ◽  
Donatella Sciuto ◽  
...  

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