Boundary scan modification to enhance multichip module testing

Proceedings of the IEEE 1992 National Aerospace and Electronics Conference@m_NAECON 1992 ◽

10.1109/naecon.1992.220475 ◽

2003 ◽

Author(s):

J.M. Aubert

Keyword(s):

Multichip Module ◽

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Boundary-scan test structures and test-bench compilation in a multichip module synthesis system

Proceedings 1992 IEEE Multi-Chip Module Conference MCMC-92 ◽

10.1109/mcmc.1992.201443 ◽

2003 ◽

Author(s):

R. Vutukuru ◽

P. Subbarao ◽

R. Vmuri

Keyword(s):

Multichip Module ◽

Boundary Scan ◽

Synthesis System ◽

Scan Test ◽

Boundary Scan Test

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Multichip Module High Speed Testing

10.21236/ada274873 ◽

1993 ◽

Author(s):

Robert J. Davis ◽

David H. Auston

Keyword(s):

Multichip Module

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Optical Interconnect Technology (OIT) Multichip Module to Multichip Module

10.21236/ada362637 ◽

1998 ◽

Author(s):

Julian Bristow ◽

Yue Liu ◽

Klein Johnson

Keyword(s):

Optical Interconnect ◽

Multichip Module ◽

Interconnect Technology

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Research and implementation of boundary scan test system based on EDIF

2015 12th IEEE International Conference on Electronic Measurement & Instruments (ICEMI) ◽

10.1109/icemi.2015.7494256 ◽

2015 ◽

Author(s):

Chen Shouhong ◽

Hou Xingna ◽

Wang Zhuang ◽

Yan Xuelong ◽

Xu Chuanpei

Keyword(s):

Test System ◽

Boundary Scan ◽

Scan Test ◽

Boundary Scan Test

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Integrated micro heat sink for power multichip module

Conference Record of 1998 IEEE Industry Applications Conference. Thirty-Third IAS Annual Meeting (Cat. No.98CH36242) ◽

10.1109/ias.1998.730275 ◽

2002 ◽

Author(s):

C. Gillot ◽

C. Schaeffer ◽

A. Bricard

Keyword(s):

Heat Sink ◽

Multichip Module

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Development of three-dimensional multichip module based on embedded substrate with multiple interconnections

2008 International Conference on Electronic Packaging Technology & High Density Packaging ◽

10.1109/icept.2008.4606955 ◽

2008 ◽

Author(s):

Gaowei Xu ◽

Yanhong Wu ◽

Fei Geng ◽

Qiuping Huang ◽

Jian Zhou ◽

...

Keyword(s):

Three Dimensional ◽

Multichip Module

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A structured graphical tool for analyzing boundary scan violations

Proceedings. International Test Conference ◽

10.1109/test.2002.1041828 ◽

2003 ◽

Author(s):

M. Cogswell ◽

S. Mardhani ◽

K. Melocco ◽

H. Arora

Keyword(s):

Boundary Scan ◽

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An improved pattern generation for Built-in Self-test design based on boundary-scan reseeding

2009 International Conference on Communications, Circuits and Systems ◽

10.1109/icccas.2009.5250336 ◽

2009 ◽

Author(s):

Enmin Tan ◽

Wenwu Qian ◽

Yan Li

Keyword(s):

Pattern Generation ◽

Test Design ◽

Boundary Scan ◽

Self Test ◽

Built In Self Test

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Thermal design for high-speed high-density multichip module

IEEE Transactions on Components Hybrids and Manufacturing Technology ◽

10.1109/33.237932 ◽

1993 ◽

Vol 16 (4) ◽

pp. 384-387 ◽

Author(s):

T. Handa ◽

S. Iida ◽

J. Utsunomiya

Keyword(s):

High Density ◽

Thermal Design ◽

Multichip Module

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A Boundary Scan Based Realization Method for Fault Diagnosis of Torn Analog Subnet

2011 First International Conference on Instrumentation, Measurement, Computer, Communication and Control ◽

10.1109/imccc.2011.51 ◽

2011 ◽

Author(s):

Cao Jin ◽

Xu Lei ◽

Guo Yifei ◽

Guo Ruixu

Keyword(s):

Fault Diagnosis ◽

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