A noise cancelling 0.7–3.8 GHz resistive feedback receiver front-end in 65 nm CMOS

Author(s):  
Anders Nejdel ◽  
Markus Tormanen ◽  
Henrik Sjoland
2018 ◽  
Vol 96 (1) ◽  
pp. 67-78 ◽  
Author(s):  
Hamid Karrari ◽  
Esmaeil Najafi Aghdam ◽  
Hassan Faraji Baghtash

2017 ◽  
Vol E100.C (3) ◽  
pp. 340-343 ◽  
Author(s):  
Duksoo KIM ◽  
Byungjoon KIM ◽  
Sangwook NAM

2019 ◽  
Vol 29 (04) ◽  
pp. 2050059
Author(s):  
Asieh Parhizkar Tarighat ◽  
Mostafa Yargholi

In this paper, a wideband low-noise amplifier (LNA) is designed based on the resistive feedback topology with a TSMC 0.18[Formula: see text][Formula: see text]m standard RF CMOS process. Bandwidth expansion is provided by the second-order Chebyshev filter. The noise figure (NF) increases at high frequency because of the source parasitic capacitors of the cascode transistor; so, noise cancelling technique is applied to the cascode transistor of the proposed LNA. Bias conditions and sizes of the transistors are optimized to cancel the nonlinear transconductance ([Formula: see text]). With this modified technique, low noise figure, high linearity and improved input and output matching can be attained for 3.1–10.6[Formula: see text]GHz frequency band. Post-layout simulation result of the proposed LNA shows the maximum power gain of 17[Formula: see text]dB at 5.5[Formula: see text]GHz frequency, NF of lower than 4.5[Formula: see text]dB over the whole band of 3.1–10.6[Formula: see text]GHz, maximum IIP2 of [Formula: see text]28[Formula: see text]dBm and IIP3 of [Formula: see text]7.5[Formula: see text]dBm, while dissipating 9[Formula: see text]mW (with buffer) from a 1.8 V supply voltage. It occupies [Formula: see text]m silicon die area.


Author(s):  
Farshad Shirani Bidabadi ◽  
Sayed Vahid Mir-moghtadaei

In this paper, an Ultra-Wideband (UWB) low noise amplifier (LNA) with low power consumption and high-power gain in 180[Formula: see text]nm CMOS technology is presented. An innovative combination of conventional methods to design UWB-LNA, i.e., resistive-feedback, inductive-series peaking, noise cancelling and inductive degeneration techniques is described here. The proposed LNA consists of two common source amplifiers with resistive feedback in which the noise and power consumption have been reduced by using the noise cancelling and current reuse techniques, respectively. Also, resistive feedback in the first stage reduces input resistance, hereby improving input impedance matching. In the second stage, which is used to increase the power gain, a common source structure with inductive-series peaking and noise cancellation techniques is used. The analytical results agree well with the post layout simulation results. The post-layout simulation shows a gain of [Formula: see text][Formula: see text]dB and noise figure (NF) of 2.3[Formula: see text]dB in the whole [Formula: see text][Formula: see text]dB bandwidth of 0.1[Formula: see text]GHz to 6.1[Formula: see text]GHz, while the S11 and S22 are less than [Formula: see text][Formula: see text]dB. The proposed circuit has a figure of merit of 9.9 which is significantly improved compared to the previous works. The total power dissipation is only 7.3[Formula: see text]mW, and the active area is less than 0.7[Formula: see text]mm2.


Author(s):  
Kaituo Yang ◽  
Chirn Chye Boon ◽  
Guangyin Feng ◽  
Chenyang Li ◽  
Zhe Liu ◽  
...  

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