A 20–44 GHz Wideband LNA Design Using the SiGe Technology for 5G Millimeter-Wave Applications

This paper presents the design and implementation of a low-noise amplifier (LNA) for millimeter-wave (mm-Wave) 5G wireless applications. The LNA was based on a common-emitter configuration with cascode amplifier topology using an IHP’s 0.13 μm Silicon Germanium (SiGe) heterojunction bipolar transistor (HBT) whose f_T/f_MAX/gate-delay is 360/450 GHz/2.0 ps, utilizing transmission lines for simultaneous noise and input matching. A noise figure of 3.02–3.4 dB was obtained for the entire wide bandwidth from 20 to 44 GHz. The designed LNA exhibited a gain (S_21) greater than 20 dB across the 20–44 GHz frequency range and dissipated 9.6 mW power from a 1.2 V supply. The input reflection coefficient (S_11) and output reflection coefficient (S_22) were below −10 dB, and reverse isolation (S_12) was below −55 dB for the 20–44 GHz frequency band. The input 1 dB (P1dB) compression point of −18 dBm at 34.5 GHz was obtained. The proposed LNA occupies only a 0.715 mm2 area, with input and output RF (Radio Frequency) bond pads. To the authors’ knowledge, this work evidences the lowest noise figure, lowest power consumption with reasonable highest gain, and highest bandwidth attained so far at this frequency band in any silicon-based technology.

CW and Modulated Input Second Harmonic Injection for Efficiency Enhancement in Broadband Power Amplifiers

The second-harmonic input impedance plays a critical role on the performance of GaN power amplifiers. In a recent paper, a drain efficiency enhancement for a continuous-mode power amplifiers was reported to be achieved using active broadband second-harmonic injection at the PA input. In this paper, the strategy for selecting the second-harmonic input impedance and the necessity for using active injection in such broadband PAs are discussed in detail. Additionally, the methodology for designing an embedded broadband diplexer in the input matching network is reported. Finally, the importance of the phase of the second-harmonic signal injected is demonstrated for both CW and modulated signals using both simulation and measurement, respectively. The effectiveness of the CW and modulated active second-harmonic injection methodology presented here are validated by previously reported measurements that demonstrated an average drain efficiency improvement of 9.4% from 1.3 to 2.4 GHz for CW signals and of 9.7% at 2 GHz for a frequency-modulated 30 MHz chirp radar signal.

Information Bottleneck Analysis by a Conditional Mutual Information Bound

Task-nuisance decomposition describes why the information bottleneck loss I(z;x)−βI(z;y) is a suitable objective for supervised learning. The true category y is predicted for input x using latent variables z. When n is a nuisance independent from y, I(z;n) can be decreased by reducing I(z;x) since the latter upper bounds the former. We extend this framework by demonstrating that conditional mutual information I(z;x|y) provides an alternative upper bound for I(z;n). This bound is applicable even if z is not a sufficient representation of x, that is, I(z;y)≠I(x;y). We used mutual information neural estimation (MINE) to estimate I(z;x|y). Experiments demonstrated that I(z;x|y) is smaller than I(z;x) for layers closer to the input, matching the claim that the former is a tighter bound than the latter. Because of this difference, the information plane differs when I(z;x|y) is used instead of I(z;x).

A compact, broadband three-way substrate integrated waveguide power divider with improved isolation

Purpose This paper aims to present a compact, broadband substrate integrated waveguide (SIW) three-way power divider with improved isolation based on six-port SIW coupler. Design/methodology/approach The power coupling among the three output ports occurs due to short openings in the narrow walls of the central SIW channel. Performance improvement in the isolation and return loss among ports is achieved using matching posts placed at the input and output ends of the coupling region. This enhances the coupling between TE10 and TE30 modes. The input matching ports enhance the return loss, whereas the isolation is alleviated by both the input and output matching posts. The bandwidth enhancement is achieved by optimizing the outer SIW channel widths. Findings The measured fractional bandwidth of 27.3% with over 15 dB of isolation and return loss is achieved. The coupling length is 1.55 λg at the centre frequency. The power divider achieves better than 15 dB isolation between non-adjacent output ports. The measured reflection and isolation coefficients are in close agreement with simulated results over 8.2 to 10.8 GHz. Practical implications Isolation between the adjacent and non-adjacent ports is an important parameter as the reflections from these ports will interfere with signals from other ports reducing the fractional bandwidth of the power divider and affecting the overall performance of the transmitters and receivers. Originality/value The authors present the enhancement of isolation between the output non-adjacent ports by optimizing the SIW channel width and matching post in the coupling region to reduce the reflected signals from non-adjacent ports entering into other ports. To the author’s knowledge, this is the only SIW three-way power divider paper showing non-adjacent port isolation among six-port couplers based three-way power dividers.

Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.

Design and Development of a Near Isotropic Printed Arc Antenna for Direction of Arrival (DoA) Applications

This research presents an easy to fabricate isotropic printed arc antenna element to be used for direction of arrival (DoA) arrays. The proposed antenna exhibits a total gain variation of 0.5 dB over the entire sphere for 40 MHz impedance bandwidth at 1 GHz, which is the best design isotropy reported in literature so far. In addition, the isotropic bandwidth of the antenna for total gain variation of ≤3 dB is 225 MHz with 86% efficiency. The isotropic wire antenna is first designed and simulated in Numerical Electromagnetic code (NEC). An equivalent printed antenna is then simulated in CST, where single (short circuited) stub is integrated with the antenna for input matching and the results of NEC simulations are verified. The planar antenna is then manufactured using FR4 substrate for measurements. Good agreement between the measured and simulated results is observed, however the total gain variation is increased to 2 dB for the fabricated antenna. This is because of the unavoidable field scattering from the antenna substrate, the feed cables, and the antenna testing platform.

A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers

This article presents a data-startable baseband logic featuring a gated oscillator clock and data recovery (GO-CDR) circuit for nanowatt wake-up and data receivers (WuRxs). At each data transition, the phase misalignment between the data coming from the analog front-end (AFE) and the clock is cleared by the GO-CDR circuit, thus allowing the reception of long data streams. Any free-running frequency mismatch between the GO and the bitrate does not limit the number of receivable bits, but only the maximum number of equal consecutive bits (Nm). To overcome this limitation, the proposed system includes a frequency calibration circuit, which reduces the frequency mismatch to ±0.5%, thus enabling the WuRx to be used with different encoding techniques up to Nm = 100. A full WuRx prototype, including an always-on clockless AFE operating in subthreshold, was fabricated with STMicroelectronics 90 nm BCD technology. The WuRx is supplied with 0.6 V, and the power consumption, excluding the calibration circuit, is 12.8 nW during the rest state and 17 nW at a 1 kbps data rate. With a 1 kbps On-Off Keying (OOK) modulated input and −35 dBm of input RF power after the input matching network (IMN), a 10−3 missed detection rate with a 0 bit error tolerance is measured, transmitting 63 bit packets with the Nm ranging from 1 to 63. The total sensitivity, including the estimated IMN gain at 100 MHz and 433 MHz, is −59.8 dBm and −52.3 dBm, respectively. In comparison with an ideal CDR, the degradation of the sensitivity due to the GO-CDR is 1.25 dBm. False alarm rate measurements lasting 24 h revealed zero overall false wake-ups.