Compact Models for Radiation Hardening by Design of SiGe BiCMOS, GaAs and SOI CMOS Microwave Circuits

2021 ◽  
Author(s):  
Denis I. Sotskov ◽  
Nikolay A. Usachev ◽  
Vadim V. Elesin ◽  
Igor O. Metelkin ◽  
Nikita M. Zhidkov ◽  
...  
Keyword(s):  
Microwave Circuits ◽  
Radiation Hardening ◽  
Sige Bicmos ◽  
Compact Models ◽  
Radiation Hardening By Design ◽  
Soi Cmos

Radiation Hardening by Design of a Novel Double-Node-Upset-Tolerant Latch Combined with Layout Technique

2018 ◽  
Author(s):  
Aibin Yan ◽  
Zhile Chen ◽  
Zhengfeng Huang ◽  
Xiangsheng Fang ◽  
Maoxiang Yi ◽  
...  
Keyword(s):  
Radiation Hardening ◽  
Layout Technique ◽  
Radiation Hardening By Design

scholarly journals Radiation Hardening by Design of Asynchronous Logic for Hostile Environments

2009 ◽  
Vol 44 (5) ◽  
pp. 1617-1628 ◽  
Author(s):  
David J. Barnhart ◽  
Tanya Vladimirova ◽  
Martin N. Sweeting ◽  
Kenneth S. Stevens
Keyword(s):  
Radiation Hardening ◽  
Asynchronous Logic ◽  
Hostile Environments ◽  
Radiation Hardening By Design

Radiation Hardening of an SiGe BiCMOS Wilkinson ADC for Distributed Motor Controller Application

2014 ◽  
Vol 61 (3) ◽  
pp. 1236-1242 ◽  
Author(s):  
Philippe C. Adell ◽  
Jeremy Yager ◽  
Zack Pannell ◽  
Jacob Shelton ◽  
Mohammad M. Mojarradi ◽  
...  
Keyword(s):  
Radiation Hardening ◽  
Motor Controller ◽  
Sige Bicmos

scholarly journals CMOS IC radiation hardening by design

2014 ◽  
Vol 27 (2) ◽  
pp. 251-258 ◽  
Author(s):  
Alessandra Camplani ◽  
Seyedruhollah Shojaii ◽  
Hitesh Shrimali ◽  
Alberto Stabile ◽  
Valentino Liberali
Keyword(s):  
Integrated Circuits ◽  
Total Dose ◽  
Radiation Hardening ◽  
Single Event ◽  
Silicon Area ◽  
Single Event Effects ◽  
Main Drawback ◽  
Conventional Design ◽  
Cmos Ic ◽  
Radiation Hardening By Design

Design techniques for radiation hardening of integrated circuits in commercial CMOS technologies are presented. Circuits designed with the proposed approaches are more tolerant to both total dose and to single event effects. The main drawback of the techniques for radiation hardening by design is the increase of silicon area, compared with a conventional design.

Radiation-Hardening-By-Design of the HighPerformance CMOS Nanometer System-on-chip

2019 ◽  
Vol 2 (1) ◽  
pp. 33-51
Author(s):  
Yu. M. Gerasimov ◽  
◽  
N. G. Grigoryev ◽  
A. V. Kobylyatskiy ◽  
Ya. Ya. Petrichkovich ◽  
...  
Keyword(s):  
System On Chip ◽  
Radiation Hardening ◽  
On Chip ◽  
Radiation Hardening By Design

New Proposed Methodology for Radiation Hardening By Design of MOS Circuits

2020 ◽  
Author(s):  
Hesham Hassan Shaker ◽  
A. A. Saleh ◽  
Mohamed Refky Amin ◽  
S. E. D. Habib
Keyword(s):  
Radiation Hardening ◽  
Mos Circuits ◽  
Radiation Hardening By Design

The Features of Radiation-Hardening-By-Design of Bulk SRAM Cells

2015 ◽  
Author(s):  
Yuriy M. Gerasimov ◽  
Nikolay G. Grigoryev ◽  
Andrey V. Kobylyatskiy ◽  
Yaroslav Ya. Petrichkovich ◽  
Tatiana V. Solokhina
Keyword(s):  
Radiation Hardening ◽  
Radiation Hardening By Design

SOI CMOS, SiGe BiCMOS, GaAs HBT and GaAs PHEMT Technologies Characterization for Radiation-Tolerant Microwave Applications

2021 ◽  
Author(s):  
Denis I. Sotskov ◽  
Alexander G. Kuznetsov ◽  
Vadim V. Elesin ◽  
Nikolay A. Usachev ◽  
George V. Chukov ◽  
...  
Keyword(s):  
Sige Bicmos ◽  
Microwave Applications ◽  
Radiation Tolerant ◽  
Soi Cmos

PD-SOI CMOS and SiGe BiCMOS Technologies for 5G and 6G communications

2020 ◽  
Author(s):  
P. Chevalier ◽  
F. Gianesello ◽  
A. Pallotta ◽  
J. Azevedo Goncalves ◽  
G. Bertrand ◽  
...  
Keyword(s):  
Sige Bicmos ◽  
Soi Cmos
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