High-voltage low-power startup backup battery switch using low voltage devices in 28nm CMOS

2016 ◽  
Author(s):  
Filippo Neri ◽  
Craig Keogh ◽  
Thomas Brauner ◽  
Eric De Mey ◽  
Christian Schippel
Keyword(s):  
Low Power ◽  
High Voltage ◽  
Low Voltage

scholarly journals A dual-stage low-power converter driving for piezoelectric actuator applied in micro robot

2019 ◽  
Vol 16 (1) ◽  
pp. 172988141982684 ◽  
Author(s):  
Ye Mu ◽  
Tianli Hu ◽  
He Gong ◽  
Lijun Wang ◽  
Shijun Li
Keyword(s):  
Low Power ◽  
High Voltage ◽  
Piezoelectric Actuator ◽  
Direct Current ◽  
Low Voltage ◽  
Alternating Current ◽  
Power Converter ◽  
Micro Robot ◽  
Dual Stage ◽  
Current Stage

In this article, a dual-stage converter driving for a piezoelectric actuator based on flyback circuit was designed and implemented, which could be applied in a micro robot. A low-voltage direct current could be converted to a high-voltage alternating current through flyback circuit and direct current/alternating current circuit in low-power condition. In the direct current/direct current stage, the charging and discharging process was realized to generate a high voltage bias from a low voltage directly supplied by battery. Then, the high voltage was converted into alternating waveform by an energy recovery circuit in direct current/alternating current stage. Experiments were conducted to verify the ability of the proposed converter to drive a 100-V-input piezoelectric bimorph actuator using a prototype 108 mg (excluding printed circuit board mass), 169 (13 × 13) mm2, and 500-mW converter. According to the experimental results, this converter could be used for driving piezoelectric actuator applied in micro robot.

Low-Voltage Variable Gain Current Amplifier for High-Voltage Signal Processing

2009 ◽  
Vol 129 (8) ◽  
pp. 1511-1517
Author(s):  
Nicodimus Retdian ◽  
Jieting Zhang ◽  
Takahide Sato ◽  
Shigetaka Takagi
Keyword(s):  
Signal Processing ◽  
High Voltage ◽  
Low Voltage ◽  
Current Amplifier ◽  
Variable Gain ◽  
Voltage Signal

Analysis of 6T SRAM Cell in Different Technologies

2017 ◽  
Vol MCSP2017 (01) ◽  
pp. 7-10 ◽  
Author(s):  
Subhashree Rath ◽  
Siba Kumar Panda
Keyword(s):  
Low Power ◽  
Data Storage ◽  
Low Voltage ◽  
Random Access ◽  
Storage Device ◽  
Cmos Process ◽  
Process Technology ◽  
Digital Devices ◽  
Noise Margin ◽  
Sram Cell

Static random access memory (SRAM) is an important component of embedded cache memory of handheld digital devices. SRAM has become major data storage device due to its large storage density and less time to access. Exponential growth of low power digital devices has raised the demand of low voltage low power SRAM. This paper presents design and implementation of 6T SRAM cell in 180 nm, 90 nm and 45 nm standard CMOS process technology. The simulation has been done in Cadence Virtuoso environment. The performance analysis of SRAM cell has been evaluated in terms of delay, power and static noise margin (SNM).

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