An Artificial Neural Network Assisted Optimization System for Analog Design Space Exploration

Author(s):  
Yaping Li ◽  
Yong Wang ◽  
Yusong Li ◽  
Ranran Zhou ◽  
Zhaojun Lin
Author(s):  
Tao Yang ◽  
Yadong Wei ◽  
Zhijun Tu ◽  
Haolun Zeng ◽  
Michel A. Kinsy ◽  
...  

Author(s):  
Gang Sun ◽  
Shuyue Wang

Artificial neural network surrogate modeling with its economic computational consumption and accurate generalization capabilities offers a feasible approach to aerodynamic design in the field of rapid investigation of design space and optimal solution searching. This paper reviews the basic principle of artificial neural network surrogate modeling in terms of data treatment and configuration setup. A discussion of artificial neural network surrogate modeling is held on different objectives in aerodynamic design applications, various patterns of realization via cutting-edge data technique in numerous optimizations, selection of network topology and types, and other measures for improving modeling. Then, new frontiers of modern artificial neural network surrogate modeling are reviewed with regard to exploiting the hidden information for bringing new perspectives to optimization by exploring new data form and patterns, e.g. quick provision of candidates of better aerodynamic performance via accumulated database instead of random seeding, and envisions of more physical understanding being injected to the data manipulation.


Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1921
Author(s):  
Hongmin Huang ◽  
Zihao Liu ◽  
Taosheng Chen ◽  
Xianghong Hu ◽  
Qiming Zhang ◽  
...  

The You Only Look Once (YOLO) neural network has great advantages and extensive applications in computer vision. The convolutional layers are the most important part of the neural network and take up most of the computation time. Improving the efficiency of the convolution operations can greatly increase the speed of the neural network. Field programmable gate arrays (FPGAs) have been widely used in accelerators for convolutional neural networks (CNNs) thanks to their configurability and parallel computing. This paper proposes a design space exploration for the YOLO neural network based on FPGA. A data block transmission strategy is proposed and a multiply and accumulate (MAC) design, which consists of two 14 × 14 processing element (PE) matrices, is designed. The PE matrices are configurable for different CNNs according to the given required functions. In order to take full advantage of the limited logical resources and the memory bandwidth on the given FPGA device and to simultaneously achieve the best performance, an improved roofline model is used to evaluate the hardware design to balance the computing throughput and the memory bandwidth requirement. The accelerator achieves 41.99 giga operations per second (GOPS) and consumes 7.50 W running at the frequency of 100 MHz on the Xilinx ZC706 board.


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