A Low-Power Class-C Voltage-Controlled Oscillator with Robust Start-Up and Compact High-Q Capacitor Array

Author(s):  
Young-Kyun Cho ◽  
Jae-Won Nam ◽  
Sang-Won Lee
Author(s):  
Wen-Cheng Lai ◽  
Sheng-Lyang Jang ◽  
Bi-Sheng Shih ◽  
Yen-Jung Su
Keyword(s):  
Class C ◽  

2018 ◽  
Vol 27 (05) ◽  
pp. 1850072
Author(s):  
Chenggang Yan ◽  
Chen Hu

A 400[Formula: see text][Formula: see text]W near-threshold supply class-C voltage controlled oscillator (VCO) with amplitude feedback loop and auto amplitude control (AAC) is proposed in this paper. The amplitude feedback loop and AAC ensure the robust startup of the proposed VCO and automatically adapts it to the class-C mode in steady state. Consequently, ultra-low power can be achieved in AAC mode and low phase noise, high swing can be achieved in AAC off mode. The proposed VCO with AAC gets ultra-low power consumption by limiting the oscillating amplitude and driving the proposed VCO into the deep Class-C mode. Additionally, the peak value detector is employed in this work to boost the controlling voltage of capacitors bank. Thus, a low on resistance of switch transistors is obtained, which increases the Q value of capacitors bank. The simulated phase noise is [Formula: see text]124.5[Formula: see text]dBc/Hz at 1[Formula: see text]MHz offset with the 1.16[Formula: see text]GHz oscillation frequency. In this case, the figure-of-merit including tuning range (FOMT) of proposed VCO is [Formula: see text]195[Formula: see text]dBc/Hz. The proposed VCO is fabricated in SMIC 40[Formula: see text]nm CMOS process and consumes 0.62[Formula: see text]mA from 0.65[Formula: see text]V supply. The measured phase noise is [Formula: see text]109[Formula: see text]dBc/Hz and FOMT is [Formula: see text]179[Formula: see text]dBc/Hz.


2015 ◽  
Vol E98.C (6) ◽  
pp. 471-479
Author(s):  
Teerachot SIRIBURANON ◽  
Wei DENG ◽  
Kenichi OKADA ◽  
Akira MATSUZAWA

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 889
Author(s):  
Xiaoying Deng ◽  
Peiqi Tan

An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively.


2011 ◽  
Vol 46 (12) ◽  
pp. 2920-2932 ◽  
Author(s):  
Ahmad Mirzaei ◽  
Hooman Darabi ◽  
David Murphy
Keyword(s):  

Author(s):  
A. Parisi ◽  
F. Tesolin ◽  
M. Mercandelli ◽  
L. Bertulessi ◽  
A. L. Lacaita
Keyword(s):  
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