scholarly journals An Ultra-Low-Power K-Band 22.2 GHz-to-26.9 GHz Current-Reuse VCO Using Dynamic Back-Gate-Biasing Technique

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 889
Author(s):  
Xiaoying Deng ◽  
Peiqi Tan
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Back Gate ◽  
Ultra Low Power ◽  
Current Reuse ◽  
K Band

An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively.

A Very Low Power Quadrature VCO with Modified Current-Reuse and Back-Gate Coupling Topology

2017 ◽  
Vol 26 (11) ◽  
pp. 1750184 ◽  
Author(s):  
Qiuzhen Wan ◽  
Jun Dong ◽  
Hui Zhou ◽  
Fei Yu
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Phase Noise ◽  
Tuning Range ◽  
Supply Voltage ◽  
Voltage Controlled Oscillator ◽  
Back Gate ◽  
Current Reuse ◽  
Quadrature Vco ◽  
In Series

In this paper, a very low power modified current-reused quadrature voltage-controlled oscillator (QVCO) is proposed with the back-gate coupling technique for the quadrature signal generation. By stacking switching transistors in series like a cascode, the modified current-reused QVCO can be constructed in a totem-pole manner to reuse the dc biasing current and lower the power consumption. By utilizing the back-gates of switching transistors as coupling terminals to achieve the quadrature outputs, the back-gate coupled QVCO improves the phase noise and reduces the power consumption compared to the conventional coupling transistor based topology. Together with the modified current-reuse and back-gate coupling techniques, the proposed QVCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of low phase noise and wide tuning range. With a dc power of 1.6[Formula: see text]mW under a 0.8[Formula: see text]V supply voltage, the simulation results show the tuning range of the QVCO is from 2.36 to 3.04[Formula: see text]GHz as the tuning voltage is varied from 0.8 to 0.0[Formula: see text]V. The phase noise is [Formula: see text]118.3[Formula: see text]dBc/Hz at 1[Formula: see text]MHz offset frequency from the carrier frequency of 2.36[Formula: see text]GHz and the corresponding figure-of-merit of the QVCO is [Formula: see text]183.7[Formula: see text]dBc/Hz.

Design Methodology of Ultra-Low-Power LC-VCOs for IoT Applications

2019 ◽  
Vol 28 (07) ◽  
pp. 1950122 ◽  
Author(s):  
Imen Ghorbel ◽  
Fayrouz Haddad ◽  
Wenceslas Rahajandraibe ◽  
Mourad Loulou
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Frequency Tuning ◽  
Supply Voltage ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Ultra Low Power ◽  
Trade Offs ◽  
Process Measurements ◽  
Lc Vco

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications of the LC-VCO is studied to easily identify its design trade-offs. This methodology has been applied to design ultra-low-power LC-VCOs for different frequency bands. An LC-VCO based on the current reuse technique has been realized with the proposed methodology in 0.13[Formula: see text][Formula: see text]m CMOS process. Measurements present an ultra-low power consumption of only 262[Formula: see text][Formula: see text]W drawn from 1[Formula: see text]V supply voltage. The measured frequency tuning range is about 10% between 2.179[Formula: see text]GHz and 2.409[Formula: see text]GHz. The post-layout simulation presents a phase noise (PN) of [Formula: see text][Formula: see text]dBc/Hz, while the measured PN is [Formula: see text][Formula: see text]dBc/Hz.

Ground-Adjustable Inductor for Wide-Tuning VCO Design

2012 ◽  
Vol 256-259 ◽  
pp. 2373-2378
Author(s):  
Wu Shiung Feng ◽  
Chin I Yeh ◽  
Ho Hsin Li ◽  
Cheng Ming Tsao
Keyword(s):  
Power Consumption ◽  
Tuning Range ◽  
Supply Voltage ◽  
Wide Band ◽  
Ultra Wide Band ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Wide Tuning Range ◽  
Chip Area ◽  
Ground Plate

A wide-tuning range voltage-controlled oscillator (VCO) with adjustable ground-plate inductor for ultra-wide band (UWB) application is presented in this paper. The VCO was implemented by standard 90nm CMOS process at 1.2V supply voltage and power consumption of 6mW. The tuning range from 13.3 GHz to 15.6 GHz with phase noise between -99.98 and -115dBc/Hz@1MHz is obtained. The output power is around -8.7 to -9.6dBm and chip area of 0.77x0.62mm2.

scholarly journals A 3.22–5.45 GHz and 199 dBc/Hz FoMT CMOS Complementary Class-C DCO

2018 ◽  
Vol 2018 ◽  
pp. 1-8
Author(s):  
Lei Ma ◽  
Na Yan ◽  
Sizheng Chen ◽  
Yangzi Liu ◽  
Hao Min
Keyword(s):  
Power Consumption ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Frequency Resolution ◽  
Corner Frequency ◽  
Cmos Process ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Class C ◽  
Digitally Controlled Oscillator

This paper implements a complementary Class-C digitally controlled oscillator (DCO) with differential transistor pairs. The transistors are dynamically biased by feedback loops separately benefiting the robust oscillation start-up with low power consumption. By optimizing three switched capacitor arrays and employing fractional capacitor array with sigma-delta modulator (SDM), the presented DCO operates from 3.22 GHz to 5.45 GHz with a 51.5% frequency tuning range and 0.1 ppm frequency resolution. The design was implemented in a 65 nm CMOS process with power consumption of 2.8 mA at 1.2 V voltage supply. Measurement results show that the phase noise is about −126 dBc/Hz at 3 MHz offset from a 5.054 GHz carrier frequency with the 1/f3 corner frequency of 260 KHz. The resulting FoMT achieves 199.4 dBc/Hz and varies less than 2 dB across the frequency tuning range.

A 260-μW Down-Conversion Demodulator for MICS-Band Receiver

2016 ◽  
Vol 26 (02) ◽  
pp. 1750027 ◽  
Author(s):  
Chia-Hung Chang ◽  
Cihun-Siyong Alex Gong ◽  
Jian-Chiun Liou ◽  
Yu-Lin Tsou ◽  
Feng-Lin Shiu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Low Power Consumption ◽  
Cmos Process ◽  
Communication Services ◽  
Ultra Low Power ◽  
Resistive Feedback ◽  
Mics Band ◽  
Down Conversion ◽  
Implant Communication

This paper showcases a low-power demodulator for medical implant communication services (MICS) applications. Complementary shunt resistive feedback, current reuse configuration, and sub-threshold LO driving techniques are proposed to achieve ultra-low power consumption. The chip has been implemented in standard CMOS process and consumes only 260-[Formula: see text]W.

An ultra low power consumption millimeter-wave voltage controlled oscillator in a 65 nm CMOS-SOI technology

2013 ◽  
Vol 76 (3) ◽  
pp. 277-286 ◽  
Author(s):  
A. Mariano ◽  
O. Mazouffre ◽  
B. Leite ◽  
Y. Deval ◽  
J. B. Begueret ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Millimeter Wave ◽  
Low Power Consumption ◽  
Voltage Controlled Oscillator ◽  
Ultra Low Power ◽  
Soi Technology

scholarly journals A Design of Wide-Range and Low Phase Noise Linear Transconductance VCO with 193.76 dBc/Hz FoMT for mm-Wave 5G Transceivers

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 935 ◽  
Author(s):  
Arash Hejazi ◽  
YoungGun Pu ◽  
Kang-Yoon Lee
Keyword(s):  
Phase Noise ◽  
Carrier Frequency ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Voltage Controlled Oscillator ◽  
Wide Range ◽  
Layout Area ◽  
Low Phase Noise

This paper presents a wide-range and low phase noise mm-Wave Voltage Controlled Oscillator (VCO) based on the transconductance linearization technique. The proposed technique eliminates the deep triode region of the active part of the VCO, and lowers the noise introduced by the gm-cell. The switch sizes inside the switched capacitor bank of the VCO are optimized to minimize the resistance of the switches while keeping the wide tuning range. A new layout technique shortens the routing of the VCO outputs, and lowers the parasitic inductance and resistance of the VCO routing. The presented method prevents the reduction of the quality factor of the tank due to the long routing. The proposed VCO achieves a discrete frequency tuning range, of 14 GHz to 18 GHz, through a linear coarse and middle switched capacitor array, and offers superior phase noise performance compared to recent state-of-the-art VCO architectures. The design is implemented in a 45 nm CMOS process and occupies a layout area (including output buffers) of 0.14 mm2. The power consumption of the VCO core is 24 mW from the power supply of 0.8 V. The post-layout simulation result shows the VCO achieves the phase noise performances of −87.2 dBc/Hz and −113 dBc/Hz, at 100 kHz and 1 MHz offset frequencies from the carrier frequency of 14 GHz, respectively. In an 18 GHz carrier frequency, the results are −87.4 dBc/Hz and −110 dBc/Hz, accordingly.

scholarly journals Power Management in Low-Power MCUs for Energy IoT Applications

2020 ◽  
Vol 2020 ◽  
pp. 1-12
Author(s):  
Ling Lin ◽  
Zhong Tang ◽  
Nianxiong Tan ◽  
Xiaohui Xiao
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Management ◽  
Power Supply ◽  
Sleep Mode ◽  
Cmos Process ◽  
Power Circuit ◽  
Ultra Low Power ◽  
Power Sources ◽  
Standby Power

In this paper, we identify and address the problems of designing effective power management schemes in low-power MCU design. Firstly, this paper proposes an application-based multipower domain architecture along with a variety of working modes to effectively realize the hierarchical control of power consumption. Furthermore, devices in energy IoT (eIoT) do not always work under the main power supply. When the main power supply is unavailable, the standby power supply (usually the battery) needs to maintain the operation and save the data. In order to ensure the complete isolation between these two power sources, it is always necessary to insert a diode in both select-conduction paths, respectively. In this paper, we built a stable and smooth power switching circuit into the chip, which can effectively avoid the diode voltage loss and reduce the BoM cost. In addition, in the sleep mode, considering the relaxed output voltage range and a limited driving capability requirement, an ultra-low-power standby power circuit is proposed, which can autonomously replace the internal LDO when in sleep, further reducing the sleep power consumption under the main power supply. Fabricated in a standard 0.11 μm CMOS process, our comparative analysis demonstrates substantial reduction in power consumption from 1 μA to 0.1 μA.

A 400 μW Near-Threshold Feedback Class-C VCO with Auto Amplitude Control

2018 ◽  
Vol 27 (05) ◽  
pp. 1850072
Author(s):  
Chenggang Yan ◽  
Chen Hu
Keyword(s):  
Low Power ◽  
Phase Noise ◽  
Feedback Loop ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Amplitude Control ◽  
Ultra Low Power ◽  
Class C ◽  
Low Phase Noise ◽  
Near Threshold

A 400[Formula: see text][Formula: see text]W near-threshold supply class-C voltage controlled oscillator (VCO) with amplitude feedback loop and auto amplitude control (AAC) is proposed in this paper. The amplitude feedback loop and AAC ensure the robust startup of the proposed VCO and automatically adapts it to the class-C mode in steady state. Consequently, ultra-low power can be achieved in AAC mode and low phase noise, high swing can be achieved in AAC off mode. The proposed VCO with AAC gets ultra-low power consumption by limiting the oscillating amplitude and driving the proposed VCO into the deep Class-C mode. Additionally, the peak value detector is employed in this work to boost the controlling voltage of capacitors bank. Thus, a low on resistance of switch transistors is obtained, which increases the Q value of capacitors bank. The simulated phase noise is [Formula: see text]124.5[Formula: see text]dBc/Hz at 1[Formula: see text]MHz offset with the 1.16[Formula: see text]GHz oscillation frequency. In this case, the figure-of-merit including tuning range (FOMT) of proposed VCO is [Formula: see text]195[Formula: see text]dBc/Hz. The proposed VCO is fabricated in SMIC 40[Formula: see text]nm CMOS process and consumes 0.62[Formula: see text]mA from 0.65[Formula: see text]V supply. The measured phase noise is [Formula: see text]109[Formula: see text]dBc/Hz and FOMT is [Formula: see text]179[Formula: see text]dBc/Hz.

scholarly journals RF CMOS Oscillators Design for autonomous Connected Objects

2019 ◽  
Vol 88 ◽  
pp. 05001
Author(s):  
Fayrouz Haddad ◽  
Wenceslas Rahajandraibe ◽  
Imen Ghorbel
Keyword(s):  
Performance Optimization ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Noise Performance ◽  
Ultra Low Power ◽  
Wireless Transceiver ◽  
Cmos Oscillators ◽  
Phase Noise Performance

Voltage controlled oscillator (VCO) is an integral part of IoT wireless transceiver components. In this paper, VCOs operating around 2.4 GHz have been designed in CMOS technology. The relation between their components and specifications is studied for their performance optimization. Ultra-low power, less than 270 µW, has been obtained, while performing a frequency tuning range of about 10% between 2.1 and 2.4 GHz. Investigations on phase noise performance have been also achieved.

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