A Performance Trade-Off for the Insulated Gate Bipolar Transistor: Buffer Layer Versus Base Lifetime Reduction

1987 ◽  
Vol PE-2 (3) ◽  
pp. 194-207 ◽  
Author(s):  
Allen R. Hefner ◽  
David L. Blackburn
2012 ◽  
Vol 717-720 ◽  
pp. 1139-1142 ◽  
Author(s):  
Kalyani G. Menon ◽  
Luther King Ngwendson ◽  
Akira Nakajima ◽  
Ekkanath Madathil Sankara Narayanan ◽  
Graham P. Bruce

The performance of a 12kV planar Clustered Insulated Gate Bipolar Transistor (CIGBT) is compared to an equivalent IGBT in 4H-SiC through extensive 2D numerical simulations. The CIGBT shows 40% reduction in Eoff-Vce(sat) trade off losses with a short circuit endurance time of more than 10µs.


2012 ◽  
Vol 33 (12) ◽  
pp. 1684-1686 ◽  
Author(s):  
Huaping Jiang ◽  
Jin Wei ◽  
Bo Zhang ◽  
Wanjun Chen ◽  
Ming Qiao ◽  
...  

2015 ◽  
Vol 36 (6) ◽  
pp. 591-593 ◽  
Author(s):  
Hao Feng ◽  
Wentao Yang ◽  
Yuichi Onozawa ◽  
Takashi Yoshimura ◽  
Akira Tamenori ◽  
...  

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