A Performance Trade-Off for the Insulated Gate Bipolar Transistor: Buffer Layer Versus Base Lifetime Reduction
1987 ◽
Vol PE-2
(3)
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pp. 194-207
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Keyword(s):
Keyword(s):
2012 ◽
Vol 717-720
◽
pp. 1139-1142
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1995 ◽
Vol 34
(Part 1, No. 1)
◽
pp. 85-86
2012 ◽
Vol 33
(12)
◽
pp. 1684-1686
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1999 ◽
Vol 30
(6)
◽
pp. 571-575
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2015 ◽
Vol 36
(6)
◽
pp. 591-593
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