A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier

21st International Conference on VLSI Design (VLSID 2008) ◽

10.1109/vlsi.2008.78 ◽

2008 ◽

Author(s):

Sounak Roy ◽

Swapna Banerjee

Keyword(s):

Sample And Hold

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Optically strobed sample-and-hold circuit

Electronics Letters ◽

10.1049/el:19870165 ◽

1987 ◽

Vol 23 (5) ◽

pp. 234-235

Author(s):

C. McConaghy

Keyword(s):

Sample And Hold

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A Reply to Comments on “New Algorithm for Measuring 50/60 Hz AC Values Based on the Usage of Slow A/D Converters” and “Measuring of Slowly Changing AC Signals Without Sample-and-Hold Circuit”

IEEE Transactions on Instrumentation and Measurement ◽

10.1109/tim.2006.880272 ◽

2006 ◽

Vol 55 (5) ◽

pp. 1859-1862 ◽

Author(s):

P. Petrovic ◽

M. Stevanovic

Keyword(s):

Sample And Hold

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A precision CMOS sample-and-hold circuit with low temperature drift for integrated transducers

The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. ◽

10.1109/mwscas.2004.1353918 ◽

2004 ◽

Author(s):

P.K. Chan ◽

J. Cui

Keyword(s):

Low Temperature ◽

Temperature Drift ◽

Sample And Hold

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A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934240 ◽

2002 ◽

Author(s):

Y. Sugimoto

Keyword(s):

Current Mode ◽

Sample And Hold

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An 8-Channel Sample-and-Hold with Multiplexed Analog Output

IEEE Transactions on Nuclear Science ◽

10.1109/tns.1973.4326910 ◽

1973 ◽

Vol 20 (1) ◽

pp. 216-220 ◽

Author(s):

A. K. Chang ◽

R. S. Larsen

Keyword(s):

Sample And Hold ◽

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Projeto de um circuito sample-and-hold autozero

10.47749/t/unicamp.1996.105697 ◽

1996 ◽

Author(s):

Robson Luiz Moreno

Keyword(s):

Sample And Hold

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A 100-Msps 700 MHz bandwidth sample-and-hold amplifier

Proceedings of the 1991 Bipolar Circuits and Technology Meeting ◽

10.1109/bipol.1991.160997 ◽

2002 ◽

Author(s):

M. Imamura ◽

N. Kusayanagi ◽

M. Segami

Keyword(s):

Sample And Hold

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Frequency Response of Finite Aperture Sample-and-Hold Systems

IEEE Transactions on Nuclear Science ◽

10.1109/tns.1983.4332269 ◽

1983 ◽

Vol 30 (1) ◽

pp. 272-277 ◽

Author(s):

A. S. Blum

Keyword(s):

Frequency Response ◽

Sample And Hold ◽

Finite Aperture

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Sample-and-Hold Asynchronous Sigma-Delta Time Encoding Machine

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2015.2504925 ◽

2016 ◽

Vol 63 (4) ◽

pp. 366-370 ◽

Author(s):

Dariusz Koscielnik ◽

Dominik Rzepka ◽

Jakub Szyduczynski

Keyword(s):

Sigma Delta ◽

Sample And Hold ◽

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Synergy Micro-Electronics Technology with a High Linearity BiCMOS Sample-and-Hold Circuit

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.473.50 ◽

2013 ◽

Vol 473 ◽

pp. 50-53

Author(s):

Jie Lin ◽

Fei Yan Mu

Keyword(s):

Dynamic Range ◽

Harmonic Distortion ◽

High Accuracy ◽

Pipeline Adc ◽

Nonlinearity Error ◽

Front End ◽

Sample And Hold ◽

Spurious Free Dynamic Range ◽

Bicmos Process ◽

A high accuracy BiCMOS sample and hold (S/H) circuit employed in the front end of a12bit 10 MS/s Pipeline ADC is presented. To reduce the nonlinearity error cause by the sampling switch, a signal dependent clock bootstrapping system is introduced. It is implemented using 0.6 um BiCMOS process. An 88.77 dB spurious-free dynamic range (SFDR), and a -105.20 dB total harmonic distortion (THD) are obtained.

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