Study of Effectiveness of Circuit Level Leakage Power Optimization Techniques in DSM CMOS Cells

International Conference on Software Technology and Engineering, 3rd (ICSTE 2011) ◽

10.1115/1.859797.paper108 ◽

2011 ◽

pp. 733-738

Keyword(s):

Power Optimization ◽

Leakage Power ◽

Optimization Techniques

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Leakage power optimization techniques for ultra deep sub-micron multi-level caches

ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486) ◽

10.1109/iccad.2003.1257876 ◽

2004 ◽

Author(s):

Nam Sung Kim ◽

D. Blaauw ◽

T. Mudge

Keyword(s):

Power Optimization ◽

Leakage Power ◽

Optimization Techniques ◽

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Power Optimization Techniques for DDR3 SDRAM

2015 28th International Conference on VLSI Design ◽

10.1109/vlsid.2015.59 ◽

2015 ◽

Author(s):

Preeti Ranjan Panda ◽

Vishal Patel ◽

Praxal Shah ◽

Namita Sharma ◽

Vaidyanathan Srinivasan ◽

...

Keyword(s):

Power Optimization ◽

Optimization Techniques

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Thermal-Induced Leakage Power Optimization by Redundant Resource Allocation

2006 IEEE/ACM International Conference on Computer Aided Design ◽

10.1109/iccad.2006.320049 ◽

2006 ◽

Author(s):

Min Ni ◽

Seda Memik

Keyword(s):

Resource Allocation ◽

Power Optimization ◽

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Power Optimization Techniques for Multicore SoCs

Multicore Systems On-Chip: Practical Software/Hardware Design - Atlantis Ambient and Pervasive Intelligence ◽

10.2991/978-94-91216-92-3_8 ◽

2013 ◽

pp. 175-193

Author(s):

Abderazek Ben Abdallah

Keyword(s):

Power Optimization ◽

Optimization Techniques

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Power Optimization Techniques

Low-Power CMOS Design ◽

10.1109/9780470545058.sect14 ◽

2009 ◽

Keyword(s):

Power Optimization ◽

Optimization Techniques

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Power Optimization Techniques for High-Level Designs Using Multiple Voltage Components for Low Power Consumption

Journal of Low Power Electronics ◽

10.1166/jolpe.2018.1547 ◽

2018 ◽

Vol 14 (2) ◽

pp. 275-284

Author(s):

Khushbu Chandrakar ◽

Sudeshna Kundu ◽

Suchismita Roy

Keyword(s):

Power Consumption ◽

Low Power ◽

Power Optimization ◽

Optimization Techniques ◽

Low Power Consumption ◽

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Leakage power optimization for clock network using dual-Vth technology

2008 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2008.4542031 ◽

2008 ◽

Author(s):

Weixiang Shen ◽

Yici Cai ◽

Xianlong Hong

Keyword(s):

Power Optimization ◽

Leakage Power ◽

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Total leakage power optimization with improved mixed gates

2005 18th Symposium on Integrated Circuits and Systems Design ◽

10.1145/1081081.1081123 ◽

2005 ◽

Author(s):

Frank Sill ◽

Frank Grassert ◽

Dirk Timmermann

Keyword(s):

Power Optimization ◽

Leakage Power ◽

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TAPO: Thermal-aware power optimization techniques for servers and data centers

2011 International Green Computing Conference and Workshops ◽

10.1109/igcc.2011.6008610 ◽

2011 ◽

Author(s):

Wei Huang ◽

Malcolm Allen-Ware ◽

John B. Carter ◽

Elmootazbellah Elnozahy ◽

Hendrik Hamann ◽

...

Keyword(s):

Data Centers ◽

Power Optimization ◽

Optimization Techniques

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Quantitative analysis and optimization techniques for on-chip cache leakage power

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2005.859476 ◽

2005 ◽

Vol 13 (10) ◽

pp. 1147-1156 ◽

Author(s):

Nam Sung Kim ◽

D. Blaauw ◽

T. Mudge

Keyword(s):

Quantitative Analysis ◽

Leakage Power ◽

Optimization Techniques ◽

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