An AOP-Based Fault Injection Environment for Cryptographic SystemC Designs

The increasing complexity of cryptographic devices requires fast simulation environment in order to test their security against fault attacks. SystemC is one promising candidate in Electronic System Level that allows models to reach higher simulation speed. However in order to enable both fault injection and detection inside a SystemC cryptographic models, its code modification is mandatory. Aspect-Oriented Programming (AOP), which is a new programming paradigm, can be used to test the robustness of the cryptographic models without any code modifications. This may replace real cryptanalysis schemes. In this paper, we present a new methodology to simulate the security fault attacks of cryptographic systems at the Electronic System Level. A fault injection/detection environment is proposed to test the resistance of cryptographic SystemC models against fault injection attacks. The fault injection technique into cryptographic SystemC models is performed using weaving faults by AspectC++ as an AOP programming language. We validate our methodology with two scenarios applied to a SystemC Advanced Encryption Standard case study: the first is related to the impact of the AOP on fault detection capabilities, while the second refers to the impact of the AOP on simulation time and size of the executable files. Simulation results show that this methodology can evaluate perfectly the robustness of a cryptographic design against fault injection attacks. They show that the impact of AOP on simulation time is not significant.

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System-Level Design to Detect Fault Injection Attacks on Embedded Real-Time Applications

ACM Journal on Emerging Technologies in Computing Systems ◽

10.1145/2967611 ◽

2017 ◽

Vol 13 (2) ◽

pp. 1-18 ◽

Cited By ~ 1

Author(s):

Wei Jiang ◽

Liang Wen ◽

Ke Jiang ◽

Xia Zhang ◽

Xiong Pan ◽

...

Keyword(s):

Real Time ◽

Fault Injection ◽

System Level ◽

System Level Design ◽

Injection Attacks ◽

Real Time Applications ◽

Level Design ◽

Fault Injection Attacks

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Error control scheme for malicious and natural faults in cryptographic modules

Journal of Cryptographic Engineering ◽

10.1007/s13389-020-00234-7 ◽

2020 ◽

Vol 10 (4) ◽

pp. 321-336

Author(s):

Mael Gay ◽

Batya Karp ◽

Osnat Keren ◽

Ilia Polian

Keyword(s):

Error Control ◽

Fault Injection ◽

Experimental Results ◽

System Level ◽

Electronic Systems ◽

Minimal Distance ◽

Outer Code ◽

Injection Attacks ◽

Control Scheme ◽

Fault Injection Attacks

Abstract Today’s electronic systems must simultaneously fulfill strict requirements on security and reliability. In particular, their cryptographic modules are exposed to faults, which can be due to natural failures (e.g., radiation or electromagnetic noise) or malicious fault-injection attacks. We present an architecture based on a new class of error-detecting codes that combine robustness properties with a minimal distance. The new architecture guarantees (with some probability) the detection of faults injected by an intelligent and strategic adversary who can precisely control the disturbance. At the same time it supports automatic correction of low-multiplicity faults. To this end, we discuss an efficient technique to correct single nibble/byte errors while avoiding full syndrome analysis. We also examine a Compact Protection Code (CPC)-based system level fault manager that considers this code an inner code (and the CPC as its outer code). We report experimental results obtained by physical fault injection on the SAKURA-G FPGA board. The experimental results reconfirm the assumption that faults may cause an arbitrary number of bit flips. They indicate that a combined inner–outer coding scheme can significantly reduce the number of fault events that go undetected due to erroneous corrections of the inner code.

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Fault Injection Attacks in Spiking Neural Networks and Countermeasures

Frontiers in Nanotechnology ◽

10.3389/fnano.2021.801999 ◽

2022 ◽

Vol 3 ◽

Author(s):

Karthikeyan Nagarajan ◽

Junde Li ◽

Sina Sayyah Ensan ◽

Sachhidh Kannan ◽

Swaroop Ghosh

Keyword(s):

Neural Networks ◽

Threshold Voltage ◽

Classification Accuracy ◽

Decay Constant ◽

Fault Injection ◽

Learning Rate ◽

Spiking Neural Networks ◽

Injection Attacks ◽

Fault Injection Attacks ◽

The Impact

Spiking Neural Networks (SNN) are fast emerging as an alternative option to Deep Neural Networks (DNN). They are computationally more powerful and provide higher energy-efficiency than DNNs. While exciting at first glance, SNNs contain security-sensitive assets (e.g., neuron threshold voltage) and vulnerabilities (e.g., sensitivity of classification accuracy to neuron threshold voltage change) that can be exploited by the adversaries. We explore global fault injection attacks using external power supply and laser-induced local power glitches on SNN designed using common analog neurons to corrupt critical training parameters such as spike amplitude and neuron’s membrane threshold potential. We also analyze the impact of power-based attacks on the SNN for digit classification task and observe a worst-case classification accuracy degradation of −85.65%. We explore the impact of various design parameters of SNN (e.g., learning rate, spike trace decay constant, and number of neurons) and identify design choices for robust implementation of SNN. We recover classification accuracy degradation by 30–47% for a subset of power-based attacks by modifying SNN training parameters such as learning rate, trace decay constant, and neurons per layer. We also propose hardware-level defenses, e.g., a robust current driver design that is immune to power-oriented attacks, improved circuit sizing of neuron components to reduce/recover the adversarial accuracy degradation at the cost of negligible area, and 25% power overhead. We also propose a dummy neuron-based detection of voltage fault injection at ∼1% power and area overhead each.

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Practical, Low-Cost Fault Injection Attacks on Personal Smart Devices

Applied Sciences ◽

10.3390/app12010417 ◽

2022 ◽

Vol 12 (1) ◽

pp. 417

Author(s):

Shaked Delarea ◽

Yossi Oren

Keyword(s):

Fault Injection ◽

Low Cost ◽

Device Under Test ◽

Smart Devices ◽

Fault Attacks ◽

Threat Model ◽

Software Application ◽

Injection Attacks ◽

Close Proximity ◽

Fault Injection Attacks

Fault attacks are traditionally considered under a threat model that assumes the device under test is in the possession of the attacker. We propose a variation on this model. In our model, the attacker integrates a fault injection circuit into a malicious field-replaceable unit, or FRU, which is later placed by the victim in close proximity to their own device. Examples of devices which incorporate FRUs include interface cards in routers, touch screens and sensor assemblies in mobile phones, ink cartridges in printers, batteries in health sensors, and so on. FRUs are often installed by after-market repair technicians without properly verifying their authenticity, and previous works have shown they can be used as vectors for various attacks on the privacy and integrity of smart devices. We design and implement a low-cost fault injection circuit suitable for placement inside a malicious FRU, and show how it can be used to practically extract secrets from a privileged system process through a combined hardware-software approach, even if the attacker software application only has user-level permissions. Our prototype produces highly effective and repeatable attacks, despite its cost being several orders of magnitude less than that of commonly used fault injection analysis lab setups. This threat model allows fault attacks to be carried out remotely, even if the device under test is in the hands of the victim. Considered together with recent advances in software-only fault attacks, we argue that resistance to fault attacks should be built into additional classes of devices.

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AES High-Level SystemC Modeling using Aspect Oriented Programming Approach

Engineering, Technology & Applied Science Research ◽

10.48084/etasr.3971 ◽

2021 ◽

Vol 11 (1) ◽

pp. 6719-6723

Author(s):

H. Mestiri ◽

I. Barraj ◽

M. Machhout

Keyword(s):

Electronic System ◽

System Level ◽

Functional Verification ◽

Programming Approach ◽

Aspect Oriented Programming ◽

Simulation Speed ◽

Executable File ◽

High Level ◽

The Impact ◽

Simulation Time

The increasing complexity of the cryptographic modeling and security simulation of the Advanced Encryption Standard (AES) necessitate fast modeling and simulation security environment. The SystemC language is used in Electronic System Level (ESL) that allows cryptographic models to achieve high security and modeling simulation speed. Yet, the use of SystemC in the security simulation requires modifications of the original code which increases the modeling complexity. The Aspect-Oriented Programming (AOP) can be used in the cryptographic modeling and security simulations without any code modification. In this paper, a new AES SystemC model using the AOP technique is presented. A functional verification environment is proposed to test the functionality of the AES SystemC AOP model, the impact of AOP on simulation time, and the size of the executable files. The design of the AES model is developed with the weaving of all modules by AspectC++ which is an AOP language. The Simulation results show the efficiency of the proposed AES model and the uses of the AOP technique do not have a significant impact on simulation time or on the size of the executable file.

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