Embedded Nanowire Network Growth and Node Device Fabrication for GaAs-Based High-Density Hexagonal Binary Decision Diagram Quantum Circuits

2006 ◽  
Vol 45 (4B) ◽  
pp. 3614-3620 ◽  
Author(s):  
Takahiro Tamura ◽  
Isao Tamai ◽  
Seiya Kasai ◽  
Taketomo Sato ◽  
Hideki Hasegawa ◽  
...  
2005 ◽  
Author(s):  
Takahiro Tamura ◽  
Isao Tamai ◽  
Seiya Kasai ◽  
Taketomo Sato ◽  
Hideki Hasegawa ◽  
...  

2012 ◽  
Vol 2012 ◽  
pp. 1-6
Author(s):  
Hong-Quan ZHao ◽  
Seiya Kasai

One-dimensional nanowire quantum devices and basic quantum logic AND and OR unit on hexagonal nanowire units controlled by wrap gate (WPG) were designed and fabricated on GaAs-based one-dimensional electron gas (1-DEG) regular nanowire network with hexagonal topology. These basic quantum logic units worked correctly at 35 K, and clear quantum conductance was achieved on the node device, logic AND circuit unit, and logic OR circuit unit. Binary-decision-diagram- (BDD-) based arithmetic logic unit (ALU) is realized on GaAs-based regular nanowire network with hexagonal topology by the same fabrication method as that of the quantum devices and basic circuits. This BDD-based ALU circuit worked correctly at room temperature. Since these quantum devices and circuits are basic units of the BDD ALU combinational circuit, the possibility of integrating these quantum devices and basic quantum circuits into the BDD-based quantum circuit with more complicated structures was discussed. We are prospecting the realization of quantum BDD combinational circuitries with very small of energy consumption and very high density of integration.


2010 ◽  
Vol 3 (2) ◽  
pp. 025002 ◽  
Author(s):  
Yuta Shiratori ◽  
Kensuke Miura ◽  
Rui Jia ◽  
Nan-Jian Wu ◽  
Seiya Kasai

Author(s):  
Anatoly A. Prihozhy

The problem of synthesis and optimisation of logical reversible and quantum circuits from functional descriptions represented as decision diagrams is considered. It is one of the key problems being solved with the aim of creating quantum computing technology and quantum computers. A new method of stepwise transformation of the initial functional specification to a quantum circuit is proposed, which provides for the following project states: reduced ordered binary decision diagram, if-decision diagram, functional if-decision diagram, reversible circuit and quantum circuit. The novelty of the method consists in extending the Shannon and Davio expansions of a Boolean function on a single variable to the expansions of the same Boolean function on another function with obtaining decomposition products that are represented by incompletely defined Boolean functions. Uncertainty in the decomposition products gives remarkable opportunities for minimising the graph representation of the specified function. Instead of two outgoing branches of the binary diagram vertex, three outgoing branches of the if-diagram vertex are generated, which increase the level of parallelism in reversible and quantum circuits. For each transformation step, appropriate mapping rules are proposed that reduce the number of lines, gates and the depth of the reversible and quantum circuit. The comparison of new results with the results given by the known method of mapping the vertices of binary decision diagram into cascades of reversible and quantum gates shows a significant improvement in the quality of quantum circuits that are synthesised by the proposed method.


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