Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems

Author(s):  
Matheus Cavalcante ◽  
Andreas Kurth ◽  
Fabian Schuiki ◽  
Luca Benini
2022 ◽  
Vol 15 (2) ◽  
pp. 1-33
Author(s):  
Mikhail Asiatici ◽  
Paolo Ienne

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by requesting each cache line only once, even when there are multiple misses corresponding to it. However, such reuse mechanism is traditionally implemented using an associative lookup. This limits the number of misses that are considered for reuse to a few tens, at most. In this article, we present an efficient pipeline that can process and store thousands of outstanding misses in cuckoo hash tables in on-chip SRAM with minimal stalls. This brings the same bandwidth advantage as a larger cache for a fraction of the area budget, because outstanding misses do not need a data array, which can significantly speed up irregular memory-bound latency-insensitive applications. In addition, we extend nonblocking caches to generate variable-length bursts to memory, which increases the bandwidth delivered by DRAMs and their controllers. The resulting miss-optimized memory system provides up to 25% speedup with 24× area reduction on 15 large sparse matrix-vector multiplication benchmarks evaluated on an embedded and a datacenter FPGA system.


2016 ◽  
Vol 39 ◽  
Author(s):  
Giosuè Baggio ◽  
Carmelo M. Vicario

AbstractWe agree with Christiansen & Chater (C&C) that language processing and acquisition are tightly constrained by the limits of sensory and memory systems. However, the human brain supports a range of cognitive functions that mitigate the effects of information processing bottlenecks. The language system is partly organised around these moderating factors, not just around restrictions on storage and computation.


2020 ◽  
Vol 63 (12) ◽  
pp. 4162-4178
Author(s):  
Emily Jackson ◽  
Suze Leitão ◽  
Mary Claessen ◽  
Mark Boyes

Purpose Previous research into the working, declarative, and procedural memory systems in children with developmental language disorder (DLD) has yielded inconsistent results. The purpose of this research was to profile these memory systems in children with DLD and their typically developing peers. Method One hundred four 5- to 8-year-old children participated in the study. Fifty had DLD, and 54 were typically developing. Aspects of the working memory system (verbal short-term memory, verbal working memory, and visual–spatial short-term memory) were assessed using a nonword repetition test and subtests from the Working Memory Test Battery for Children. Verbal and visual–spatial declarative memory were measured using the Children's Memory Scale, and an audiovisual serial reaction time task was used to evaluate procedural memory. Results The children with DLD demonstrated significant impairments in verbal short-term and working memory, visual–spatial short-term memory, verbal declarative memory, and procedural memory. However, verbal declarative memory and procedural memory were no longer impaired after controlling for working memory and nonverbal IQ. Declarative memory for visual–spatial information was unimpaired. Conclusions These findings indicate that children with DLD have deficits in the working memory system. While verbal declarative memory and procedural memory also appear to be impaired, these deficits could largely be accounted for by working memory skills. The results have implications for our understanding of the cognitive processes underlying language impairment in the DLD population; however, further investigation of the relationships between the memory systems is required using tasks that measure learning over long-term intervals. Supplemental Material https://doi.org/10.23641/asha.13250180


ASHA Leader ◽  
2007 ◽  
Vol 12 (16) ◽  
pp. 8-11 ◽  
Author(s):  
Nidhi Mahendra ◽  
Allegra Apple
Keyword(s):  

Author(s):  
Fadi P. Deek ◽  
James A. M. McHugh
Keyword(s):  

Author(s):  
Chrisanthi Nega

Abstract. Four experiments were conducted investigating the effect of size congruency on facial recognition memory, measured by remember, know and guess responses. Different study times were employed, that is extremely short (300 and 700 ms), short (1,000 ms), and long times (5,000 ms). With the short study time (1,000 ms) size congruency occurred in knowing. With the long study time the effect of size congruency occurred in remembering. These results support the distinctiveness/fluency account of remembering and knowing as well as the memory systems account, since the size congruency effect that occurred in knowing under conditions that facilitated perceptual fluency also occurred independently in remembering under conditions that facilitated elaborative encoding. They do not support the idea that remember and know responses reflect differences in trace strength.


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