A framework for the specification and validation of dynamic reconfigurable systems

2021 ◽  
Vol 21 (2) ◽  
pp. 18-32
Author(s):  
Antoine El-Hokayem ◽  
Marius Bozga ◽  
Joseph Sifakis
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Linear Time ◽  
Experimental Results ◽  
Effective Model ◽  
Reconfigurable Systems ◽  
Verification Tool ◽  
Linear Time Temporal Logic ◽  
Checking Procedure ◽  
System Configurations

We study a framework for the specification and validation of dynamic reconfigurable systems. The framework is based on configuration logic for the description of architecture styles which are families of architectures sharing common connectivity features. We express specifications in the Temporal Configuration Logic (TCL), a linear time temporal logic built from atomic formulas characterizing system configurations and temporal modalities. Two non-trivial benchmarks are introduced to show the adequacy of TCL for the specification of dynamic reconfigurable systems. We study an effective model-checking procedure based on SMT techniques for a non-trivial fragment of TCL which has been implemented in a prototype runtime verification tool. We provide preliminary experimental results illustrating the capabilities of the tool on the considered benchmark systems.

scholarly journals Verifying Fault-Tolerance in Probabilistic Swarm Systems

2020 ◽  
Author(s):  
Alessio Lomuscio ◽  
Edoardo Pirovano
Keyword(s):  
Fault Tolerance ◽  
Temporal Logic ◽  
Decision Problem ◽  
Swarm Robotics ◽  
Linear Time ◽  
Experimental Results ◽  
Robotic Swarms ◽  
Linear Time Temporal Logic ◽  
Probabilistic Nature

We present a method for reasoning about fault-tolerance in unbounded robotic swarms. We introduce a novel semantics that accounts for the probabilistic nature of both the swarm and possible malfunctions, as well as the unbounded nature of swarm systems. We define and interpret a variant of probabilistic linear-time temporal logic on the resulting executions, including those arising from faulty behaviour by some of the agents in the swarm. We specify the decision problem of parameterised fault-tolerance, which concerns determining whether a probabilistic specification holds under possibly faulty behaviour. We outline a verification procedure that we implement and use to study a foraging protocol from swarm robotics, and report the experimental results obtained.

Logical foundations of hierarchical model checking

2018 ◽  
Vol 52 (4) ◽  
pp. 539-563 ◽  
Author(s):  
Norihiro Kamide
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Hierarchical Model ◽  
Design Methodology ◽  
Linear Time ◽  
Hierarchical Systems ◽  
Content Type ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Linear Time Temporal Logic

Purpose The purpose of this paper is to develop new simple logics and translations for hierarchical model checking. Hierarchical model checking is a model-checking paradigm that can appropriately verify systems with hierarchical information and structures. Design/methodology/approach In this study, logics and translations for hierarchical model checking are developed based on linear-time temporal logic (LTL), computation-tree logic (CTL) and full computation-tree logic (CTL*). A sequential linear-time temporal logic (sLTL), a sequential computation-tree logic (sCTL), and a sequential full computation-tree logic (sCTL*), which can suitably represent hierarchical information and structures, are developed by extending LTL, CTL and CTL*, respectively. Translations from sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are defined, and theorems for embedding sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are proved using these translations. Findings These embedding theorems allow us to reuse the standard LTL-, CTL-, and CTL*-based model-checking algorithms to verify hierarchical systems that are modeled and specified by sLTL, sCTL and sCTL*. Originality/value The new logics sLTL, sCTL and sCTL* and their translations are developed, and some illustrative examples of hierarchical model checking are presented based on these logics and translations.

scholarly journals REASONING ABOUT TRANSFINITE SEQUENCES

2007 ◽  
Vol 18 (01) ◽  
pp. 87-112 ◽  
Author(s):  
STÉPHANE DEMRI ◽  
DAVID NOWAK
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Linear Time ◽  
Temporal Logics ◽  
Future Time ◽  
New Class ◽  
Linear Time Temporal Logic ◽  
Do So ◽  
Time Operators

We introduce a family of temporal logics to specify the behavior of systems with Zeno behaviors. We extend linear-time temporal logic LTL to authorize models admitting Zeno sequences of actions and quantitative temporal operators indexed by ordinals replace the standard next-time and until future-time operators. Our aim is to control such systems by designing controllers that safely work on ω-sequences but interact synchronously with the system in order to restrict their behaviors. We show that the satisfiability and model-checking for the logics working on ωk-sequences is EXPSPACE-complete when the integers are represented in binary, and PSPACE-complete with a unary representation. To do so, we substantially extend standard results about LTL by introducing a new class of succinct ordinal automata that can encode the interaction between the different quantitative temporal operators.

scholarly journals Parallel Model Checking Algorithms for Linear-Time Temporal Logic

2018 ◽  
pp. 457-507 ◽  
Author(s):  
Jiri Barnat ◽  
Vincent Bloemen ◽  
Alexandre Duret-Lutz ◽  
Alfons Laarman ◽  
Laure Petrucci ◽  
...  
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Linear Time ◽  
Parallel Model ◽  
Linear Time Temporal Logic

Verifying linear time temporal logic properties of concurrent Ada programs with quasar

2004 ◽  
Vol XXIV (1) ◽  
pp. 17-24 ◽  
Author(s):  
S. Evangelista ◽  
C. Kaiser ◽  
J. F. Pradat-Peyre ◽  
P. Rousseau
Keyword(s):  
Temporal Logic ◽  
Linear Time ◽  
Linear Time Temporal Logic

Vehicle route-sequence planning using temporal logic

2002 ◽  
Vol 16 (1) ◽  
pp. 31-38
Author(s):  
KIAM TIAN SEOW ◽  
MICHEL PASQUIER
Keyword(s):  
Temporal Logic ◽  
Linear Time ◽  
Simple Procedure ◽  
Precedence Constraints ◽  
Sequence Planning ◽  
Vehicle Route ◽  
Passenger Travel ◽  
State Formula ◽  
Linear Time Temporal Logic ◽  
Service Task

This paper proposes a new logical framework for vehicle route-sequence planning of passenger travel requests. Each request is a fetch-and-send service task associated with two request-locations, namely, a source and a destination. The proposed framework is developed using propositional linear time temporal logic of Manna and Pnueli. The novelty lies in the use of the formal language for both the specification and theorem-proving analysis of precedence constraints among the location visits that are inherent in route sequences. In the framework, legal route sequences—each of which visits every request location once and only once in the precedence order of fetch-and-send associated with every such request—is formalized and justified, forming a basis upon which the link between a basic precedence constraint and the corresponding canonical forbidden-state formula is formally established. Over a given base route plan, a simple procedure to generate a feasible subplan based on a specification of the forbidden-state canonical form is also given. An example demonstrates how temporal logic analysis and the proposed procedure can be applied to select a final (feasible) subplan based on additional precedence constraints.

Ein Ansatz zur formalen Verifikation von Schaltungsbeschreibungen in SystemC (An Approach for Formal Verification of Circuits in SystemC)

2003 ◽  
Vol 45 (4) ◽  
Author(s):  
Daniel Große ◽  
Rolf Drechsler
Keyword(s):  
Formal Verification ◽  
Temporal Logic ◽  
Linear Time ◽  
Linear Time Temporal Logic

ZusammenfassungDer vorgestellte Ansatz ermöglicht es, für SystemC-Schaltkreisbeschreibungen, die über einer gegebenen Gatterbibliothek definiert sind, Eigenschaften zu beweisen (engl. property checking). Als Spezifikationssprache wird LTL (linear time temporal logic) verwendet. Für den Beweis einer LTL-Eigenschaft kann die Erfüllbarkeit einer Booleschen Funktion betrachtet werden, die aus der Eigenschaft und der Schaltkreisbeschreibung mittels symbolischer Methoden konstruiert wird. Im Gegensatz zu simulationsbasierten Ansätzen kann dabei Vollständigkeit gewährleistet werden. Anhand einer Fallstudie eines skalierbaren Arbiters wird die Effizienz des Beweisverfahrens untersucht.

Sign in / Sign up

Export Citation Format

Share Document