Comparative performance evaluation of routing algorithm and topology size for wireless network-on-chip

Wireless Network-on-Chip or WiNoC is an alternative to traditional planar on-chip networks. On-chip wireless links are utilized to reduce latency between distant nodes due to its capability to communicate with far-away node within a single hop. This paper analyzes the impact of various routing schemes and the effect of WiNoC sizes on network traffic distributions compared to conventional mesh NoC. Radio hubs (4×4) are evenly placed on WiNoC to analyze global average delay, throughput, energy consumption and wireless utilization. For validation, three various network sizes (8×8, 16×16 and 32×32) of mesh NoC and WiNoC architectures are simulated on cycle-accurate Noxim simulator under numerous traffic load distributions. Simulation results show that WiNoC architecture with the 16×16 network size has better average speedup (∼1.2×) and improved network throughputs by 6.36% in non-uniform transpose traffic distribution. As the trade-off, WiNoC requires 63% higher energy consumption compared to the classical wired NoC mesh.

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Comparative Performance Analysis of  Selected Routing Algorithms by Load Variation of 2-Dimensional Mesh Topology Based  Network-On-Chip

ELEKTRIKA- Journal of Electrical Engineering ◽

10.11113/elektrika.v20n3.249 ◽

2021 ◽

Vol 20 (3) ◽

pp. 1-6

Author(s):

Mohammed Shaba Saliu ◽

Muyideen Omuya Momoh ◽

Pascal Uchenna Chinedu ◽

Wilson Nwankwo ◽

Aliu Daniel

Keyword(s):

Routing Algorithm ◽

Adaptive Routing ◽

Injection Rate ◽

Network On Chip ◽

Routing Algorithms ◽

Comparative Performance ◽

Traffic Pattern ◽

Mesh Topology ◽

Similar Vein ◽

On Chip

Network-on-Chip (NoC) has been proposed as a viable solution to the communication challenges on System-on-Chips (SoCs). As the communication paradigm of SoC, NoCs performance depends mainly on the type of routing algorithm chosen. In this paper different categories of routing algorithms were compared. These include XY routing, OE turn model adaptive routing, DyAD routing and Age-Aware adaptive routing. By varying the load at different Packet Injection Rate (PIR) under random traffic pattern, comparison was conducted using a 4 × 4 mesh topology. The Noxim simulator, a cycle accurate systemC based simulator was employed. The packets were modeled as a Poisson distribution; first-in-first-out (FIFO) input buffer channel with a depth of five (5) flits and a flit size of 32 bits; and a packet size of 3 flits respectively. The simulation time was 10,000 cycles. The findings showed that the XY routing algorithm performed better when the PIR is low. In a similar vein, the DyAD routing and Age-aware algorithms performed better when the load i.e. PIR is high.

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Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip

Electronics ◽

10.3390/electronics9030392 ◽

2020 ◽

Vol 9 (3) ◽

pp. 392 ◽

Cited By ~ 2

Author(s):

Seung Chan Lee ◽

Tae Hee Han

Keyword(s):

Heat Dissipation ◽

Routing Algorithm ◽

Adaptive Routing ◽

Network On Chip ◽

Traffic Load ◽

Thermal Dissipation ◽

3D Network ◽

Die Stacking ◽

On Chip ◽

Q Function

Die-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip communication infrastructure, suffers from increased thermal density and unbalanced heat dissipation across multi-stacked layers, significantly affecting chip performance and reliability. Recent studies have focused on runtime thermal management (RTM) techniques for improving the heat distribution balance, but performance degradations, owing to RTM mechanisms and unbalanced inter-layer traffic distributions, remain unresolved. In this study, we present a Q-function-based traffic- and thermal-aware adaptive routing algorithm, utilizing a reinforcement machine learning technique that gradually incorporates updated information into an RTM-based 3D NoC routing path. The proposed algorithm initially collects deadlock-free directions, based on the RTM and topology information. Subsequently, Q-learning-based decision making (through the learning of regional traffic information) is deployed for performance improvement with more balanced inter-layer traffic. The simulation results show that the proposed routing algorithm can improve throughput by 14.0%–28.2%, with a 24.9% more balanced inter-layer traffic load and a 30.6% more distributed inter-layer thermal dissipation on average, compared with those obtained in previous studies of a 3D NoC with an 8 × 8 × 4 mesh topology.

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