Low Common-Mode Gain Instrumentation Amplifier Architecture Insensitive to Resistor Mismatches

Author(s):  
Zainul Abidin ◽  
Koichi Tanno ◽  
Shota Mago ◽  
Hiroki Tamura

<pre>In this paper, an instrumentation amplifier architecture for biological <br />signal is proposed. First stage of conventional IA architecture was modified <br />by using fully balanced differential difference amplifier and evaluated by <br />using <span>1P</span> <span>2M</span> 0.6<span>μ</span>m CMOS process. From <span>HSPICE</span> simulation result, lower <br />common-mode voltage can be achieved by proposed IA architecture. <br />Actual fabrication was done and six chips were evaluated. From the evaluation result, average common-mode gain of proposed IA architecture <br />is <span>10.84</span> dB lower than that of conventional one without requiring <br />well-matched resistors. Therefore, the proposed IA architecture <br />is suitable for biological signal processing.<br /><br /></pre>

Author(s):  
Zainul Abidin ◽  
Koichi Tanno ◽  
Shota Mago ◽  
Hiroki Tamura

<pre>In this paper, an instrumentation amplifier architecture for biological <br />signal is proposed. First stage of conventional IA architecture was modified <br />by using fully balanced differential difference amplifier and evaluated by <br />using <span>1P</span> <span>2M</span> 0.6<span>μ</span>m CMOS process. From <span>HSPICE</span> simulation result, lower <br />common-mode voltage can be achieved by proposed IA architecture. <br />Actual fabrication was done and six chips were evaluated. From the evaluation result, average common-mode gain of proposed IA architecture <br />is <span>10.84</span> dB lower than that of conventional one without requiring <br />well-matched resistors. Therefore, the proposed IA architecture <br />is suitable for biological signal processing.<br /><br /></pre>


Author(s):  
Zainul Abidin ◽  
Koichi Tanno ◽  
Shota Mago ◽  
Hiroki Tamura

<p>In this paper, a new Instrumentation Amplifier (IA) architecture for biological signal pro-cessing is proposed. First stage of the proposed IA architecture consists of fully balance differential difference amplifier and three resistors. Its second stage was designed by using differential difference amplifier and two resistors. The second stage has smaller number of resistors than that of conventional one. The IA architectures are simulated and compared by using 1P 2M 0:6-m CMOS process. From HSPICE simulation result, lower common-mode voltage can be achieved by the proposed IA architecture. Average common-mode gain (Ac) of the proposed IA architecture is 31:26 dB lower than that of conventional one under 3% resistor mismatches condition. Therefore, the Ac of the proposed IA architecture is more insensitive to resistor mismatches and suitable for biological signal processing.</p>


PLoS ONE ◽  
2013 ◽  
Vol 8 (7) ◽  
pp. e68345 ◽  
Author(s):  
Patrick Hillenbrand ◽  
Georg Fritz ◽  
Ulrich Gerland

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kulbhushan Sharma ◽  
Anisha Pathania ◽  
Jaya Madan ◽  
Rahul Pandey ◽  
Rajnish Sharma

Purpose Adoption of integrated MOS based pseudo-resistor (PR) structures instead of using off-chip passive poly resistors for analog circuits in complementary metal oxide semiconductor technology (CMOS) is an area-efficient way for realizing larger time constants. However, issue of common-mode voltage shifting and excess dependency on the process and temperature variations introduce nonlinearity in such structures. So there is dire need to not only closely look for the origin of the problem with the help of a thorough mathematical analysis but also suggest the most suitable PR structure for the purpose catering broadly to biomedical analog circuit applications. Design/methodology/approach In this work, incremental resistance (IR) expressions and IR range for balanced PR (BPR) structures operating in the subthreshold region have been closely analyzed for broader range of process-voltage-temperature variations. All the post-layout simulations have been obtained using BSIM3V3 device models in 0.18 µm standard CMOS process. Findings The obtained results show that the pertinent problem of common-mode voltage shifting in such PR structures is completely resolved in scaled gate linearization and bulk-driven quasi-floating gate (BDQFG) BPR structures. Among all BPR structures, BDQFG BPR remarkably shows constant IR value of 1 TΩ over −1 V to 1 V voltage swing for wider process and temperature variations. Research limitations/implications Various balanced PR design techniques reported in this work will help the research community in implementing larger time constants for analog-mixed signal circuits. Social implications The PR design techniques presented in the present piece of work is expected to be used in developing tunable and accurate biomedical prosthetics. Originality/value The BPR structures thoroughly analyzed and reported in this work may be useful in the design of analog circuits specifically for applications such as neural signal recording, cardiac electrical impedance tomography and other low-frequency biomedical applications.


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