scholarly journals Development of advanced automated test equipment for digital system by using FPGA

Author(s):  
Adharul Muttaqin ◽  
Zainul Abidin ◽  
Raden Arief Setyawan ◽  
Itsna Az Zahra

One of the fundamental devices in electronics, Integrated Circuit (IC), is usually applied in more complex devices. Before the IC is used, it has to pass some tests to guarantee that its function is in accordance with the specifications. Automated Test Equipment (ATE) is used to test many electronics devices, including ICs. Nowadays, with the rapid advance in electronics technology, the industry will need more advanced ATE to fulfill customers demand. One of the applicative solutions is improvement and integration of a standalone module in commercial ATE owned by the company. ASL 1000 Test System is one of the ATE that is still widely used in industry. ASL 1000 has one limitation in one of its module, Digital Driver and Detector (DDD). The limitation is how much vector pattern that can be saved in the memory. Based on the observation in DDD instrument, a standalone module that has similar specifications as DDD can be designed using Field Programmable Gate Array (FPGA) as its base component. In the standalone module plan, supporting circuits are used, these are interface circuit between FPGA and PC using RS-232 and ASIC as ATE drivers or comparators to connect FPGA and device under test (DUT). The result of the study shows that the designed module can receive and send 8-bit data at 19.200 baud rate. It can write and read 16-bit data from and to SDR SDRAM within 90 ns and 80 ns for one cycle. It can control DAC type AD5308 in standalone operation and DAC type AD5676 in daisy chain operation to generate specific voltage in specific channel. In behavioral simulation, main controller module has already worked in accordance with the desired specifications.

Author(s):  
Carl M. Nail

Abstract Dice must often be removed from their packages and reassembled into more suitable packages for them to be tested in automated test equipment (ATE). Removing bare dice from their substrates using conventional methods poses risks for chemical, thermal, and/or mechanical damage. A new removal method is offered using metallography-based and parallel polishing-based techniques to remove the substrate while exposing the die to minimized risk for damage. This method has been tested and found to have a high success rate once the techniques are learned.


2014 ◽  
pp. 27-33
Author(s):  
Mounir Bouhedda ◽  
Mokhtar Attari

The aim of this paper is to introduce a new architecture using Artificial Neural Networks (ANN) in designing a 6-bit nonlinear Analog to Digital Converter (ADC). A study was conducted to synthesise an optimal ANN in view to FPGA (Field Programmable Gate Array) implementation using Very High-speed Integrated Circuit Hardware Description Language (VHDL). Simulation and tests results are carried out to show the efficiency of the designed ANN.


2021 ◽  
Vol 141 (8) ◽  
pp. 856-859
Author(s):  
Satoshi Koyama ◽  
Taku Sato ◽  
Jun'ichi Okayasu ◽  
Hideyuki Okabe ◽  
Masayuki Kimishima

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