A Threshold Setting Method for Load-Propotional Dynamic Frequency Scaling

2016 ◽  
Vol 136 (1) ◽  
pp. 99-100
Author(s):  
Rika Inoue ◽  
Hiroshi Inai
2015 ◽  
Vol 25 (01) ◽  
pp. 1640005 ◽  
Author(s):  
Hitoshi Oi

Dynamic frequency scaling (DFS) is a feature commonly found in modern processors. It lowers the clock frequency of a core according to the load level and reduces the power consumption. In this paper, we present a case study of tuning DFS parameters on a platform with an AMD Phenom II X6 using the SPECjEnterprise2010 (jEnt10) and SPECjbb2005 (jbb05) as the workload. In jEnt10, a longer sampling period of core utilization (up to 1.5[Formula: see text]s) reduced the power by 6[Formula: see text]Watt at 25% load level. At 50% load level, combining it with an increased threshold level (98%) to switch the clock frequency further reduced the power consumption by up to 10[Formula: see text]Watt. In jbb05, stretching the sampling period was only effective up to 0.5[Formula: see text]s. The maximum reduction was observed at around 60% load level. Raising the threshold level was not effective for jbb05.


2006 ◽  
Vol 41 (9) ◽  
pp. 2077-2082 ◽  
Author(s):  
J.-H. Kim ◽  
Y.-H. Kwak ◽  
M. Kim ◽  
S.-W. Kim ◽  
C. Kim

2006 ◽  
Vol 2 (3) ◽  
pp. 356-364
Author(s):  
A. P. Kakarountas ◽  
N. D. Zervas ◽  
G. Theodoridis ◽  
H. E. Michail ◽  
D. Soudris

Sign in / Sign up

Export Citation Format

Share Document