An Approach to Test Program Generation Based on Formal Specifications of Caching and Address Translation Mechanisms

Proceedings of the Institute for System Programming of RAS ◽

10.15514/ispras-2015-27(3)-9 ◽

2015 ◽

pp. 125-138 ◽

Cited By ~ 1

Author(s):

A. Kamkin ◽

A. Protsenko ◽

A. Tatarnikov

Keyword(s):

Formal Specifications ◽

Test Program ◽

Program Generation ◽

Address Translation

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On automatic software-based self-test program generation based on high-level decision diagrams

2016 17th Latin-American Test Symposium (LATS) ◽

10.1109/latw.2016.7483357 ◽

2016 ◽

Cited By ~ 3

Author(s):

Artjom Jasnetski ◽

Raimund Ubar ◽

Anton Tsertov

Keyword(s):

Decision Diagrams ◽

Test Program ◽

Program Generation ◽

Automatic Software ◽

Self Test ◽

High Level

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Weighted random test program generation for a per-pin tester

Proceedings. International Test Conference 1990 ◽

10.1109/test.1990.114122 ◽

2002 ◽

Author(s):

J. Gartner ◽

B. Driscoll ◽

D. Forlenza ◽

O. Forlenza ◽

T. Koprowski ◽

...

Keyword(s):

Test Program ◽

Random Test ◽

Program Generation

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MicroTESK: A Tool for Constrained Random Test Program Generation for Microprocessors

Lecture Notes in Computer Science - Perspectives of System Informatics ◽

10.1007/978-3-319-74313-4_28 ◽

2018 ◽

pp. 387-393

Author(s):

Alexander Kamkin ◽

Andrei Tatarnikov

Keyword(s):

Test Program ◽

Random Test ◽

Program Generation

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Reinforcement-Learning-Based Test Program Generation for Software-Based Self-Test

2019 IEEE 28th Asian Test Symposium (ATS) ◽

10.1109/ats47505.2019.00013 ◽

2019 ◽

Author(s):

Ching-Yuan Chen ◽

Jiun-Lang Huang

Keyword(s):

Reinforcement Learning ◽

Test Program ◽

Program Generation ◽

Self Test

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Automatic test program generation for a block oriented VLSI chip design

[1989] Proceedings of the 1st European Test Conference ◽

10.1109/etc.1989.36222 ◽

2003 ◽

Cited By ~ 2

Author(s):

F. Hapke

Keyword(s):

Automatic Test ◽

Test Program ◽

Chip Design ◽

Program Generation ◽

Vlsi Chip

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Random test program generation for verification and validation of the Samsung Reconfigurable Processor

Journal of Systems Architecture ◽

10.1016/j.sysarc.2019.05.007 ◽

2019 ◽

Vol 97 ◽

pp. 219-238 ◽

Cited By ~ 1

Author(s):

Bernhard Egger ◽

Eunjin Song ◽

Hochan Lee ◽

Daeyong Shin

Keyword(s):

Verification And Validation ◽

Test Program ◽

Reconfigurable Processor ◽

Random Test ◽

Program Generation

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Optimization of access points for automatic test program generation and fault location in large analogue circuits and systems

Microelectronics Reliability ◽

10.1016/s0026-2714(82)80245-x ◽

1982 ◽

Vol 22 (4) ◽

pp. 899-900

Keyword(s):

Fault Location ◽

Automatic Test ◽

Test Program ◽

Access Points ◽

Program Generation ◽

Analogue Circuits

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Random testing of C compilers based on test program generation by equivalence transformation

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) ◽

10.1109/apccas.2016.7804063 ◽

2016 ◽

Cited By ~ 4

Author(s):

Kazuhiro Nakamura ◽

Nagisa Ishiura

Keyword(s):

Equivalence Transformation ◽

Random Testing ◽

Test Program ◽

Program Generation

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Genesys-pro: innovations in test program generation for functional processor verification

IEEE Design & Test of Computers ◽

10.1109/mdt.2004.1277900 ◽

2004 ◽

Vol 21 (2) ◽

pp. 84-93 ◽

Cited By ~ 93

Author(s):

A. Adir ◽

E. Almog ◽

L. Fournier ◽

E. Marcus ◽

M. Rimon ◽

...

Keyword(s):

Test Program ◽

Program Generation ◽

Processor Verification

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Automatic test program generation using graphical tools for producing factory and CASS ATLAS test code

AUTOTESTCON 93 ◽

10.1109/autest.1993.396372 ◽

2002 ◽

Author(s):

M.C. Scallan

Keyword(s):

Automatic Test ◽

Test Program ◽

Program Generation

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