Performance of Thin Film Silicon MEMS on Flexible Plastic Substrates

2007 ◽  
Vol 989 ◽  
Author(s):  
Samadhan Patil ◽  
Virginia Chu ◽  
Joao Pedro Conde
Keyword(s):  
Thin Film ◽  
Tensile Strain ◽  
Sacrificial Layer ◽  
Compressive Strain ◽  
Wet Etching ◽  
Processing Temperature ◽  
Plastic Substrates ◽  
Thin Film Silicon ◽  
Lift Off ◽  
Hydrogenated Amorphous

AbstractMicroresonators based on thin film hydrogenated amorphous silicon microbridges were fabricated by surface micromachining on flexible polyethylene terephthalate (PET) substrates with a maximum processing temperature of 110°C. An aluminum sacrificial layer is used which is patterned by either wet etching or lift-off. Resonance in the MHz range was observed using electrostatic actuation. Processing of the microbridges on PET with sacrificial layer patterned by lift-off has higher yield than by etching. Bending measurements show that the thin film silicon microbridges on PET can withstand a higher compressive strain (-2.5%) than tensile strain (1.25%).

scholarly journals High-yield fabrication of perpendicularly magnetised synthetic antiferromagnetic nanodiscs

Nano Research ◽  
2021 ◽  
Author(s):  
Emma N. Welbourne ◽  
Tarun Vemulkar ◽  
Russell P. Cowburn
Keyword(s):  
Thin Film ◽  
Magnetic Properties ◽  
Sacrificial Layer ◽  
Nanosphere Lithography ◽  
High Yield ◽  
Perpendicular Anisotropy ◽  
Ion Milling ◽  
Lift Off

AbstractSynthetic antiferromagnetic (SAF) particles with perpendicular anisotropy display a number of desirable characteristics for applications in biological and other fluid environments. We present an efficient and effective method for the patterning of ultrathin Ruderman-Kittel-Kasuya-Yoshida coupled, perpendicularly magnetised SAFs using a combination of nanosphere lithography and ion milling. A Ge sacrificial layer is utilised, which provides a clean and simple lift-off process, as well as maintaining the key magnetic properties that are beneficial to target applications. We demonstrate that the method is capable of producing a particularly high yield of well-defined, thin film based nanoparticles.

Amorphous Silicon, Microcrystalline Silicon, and Thin-Film Polycrystalline Silicon Solar Cells

MRS Bulletin ◽  
2007 ◽  
Vol 32 (3) ◽  
pp. 219-224 ◽  
Author(s):  
Ruud E.I. Schropp ◽  
Reinhard Carius ◽  
Guy Beaucarne
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Crystalline Silicon ◽  
Low Cost ◽  
Float Glass ◽  
Film Material ◽  
Microcrystalline Silicon ◽  
Plastic Substrates ◽  
Thin Film Silicon ◽  
Amorphous Si

AbstractThin-film solar cell technologies based on Si with a thickness of less than a few micrometers combine the low-cost potential of thin-film technologies with the advantages of Si as an abundantly available element in the earth's crust and a readily manufacturable material for photovoltaics (PVs). In recent years, several technologies have been developed that promise to take the performance of thin-film silicon PVs well beyond that of the currently established amorphous Si PV technology. Thin-film silicon, like no other thin-film material, is very effective in tandem and triple-junction solar cells. The research and development on thin crystalline silicon on foreign substrates can be divided into two different routes: a low-temperature route compatible with standard float glass or even plastic substrates, and a high-temperature route (>600°C). This article reviews the material properties and technological challenges of the different thin-film silicon PV materials.

Creating Thin-Film Silicon on Flexible Substrates using Adhesive Bonding and Wet Etching

2019 ◽  
Vol 16 (8) ◽  
pp. 287-294 ◽  
Author(s):  
Shin-Da Song ◽  
Susan L. Holl ◽  
Cynthia Colinge ◽  
Ki Y. Byun ◽  
K. D. Hobart ◽  
...  
Keyword(s):  
Thin Film ◽  
Adhesive Bonding ◽  
Wet Etching ◽  
Flexible Substrates ◽  
Thin Film Silicon

Flexible a-Si:H/nc-Si:H tandem thin film silicon solar cells on plastic substrates withi-layers made by hot-wire CVD

2008 ◽  
Vol 2 (4) ◽  
pp. 157-159 ◽  
Author(s):  
Hongbo Li ◽  
C. H. M. van der Werf ◽  
A. Borreman ◽  
J. K. Rath ◽  
Ruud E. I. Schropp
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Silicon Solar Cells ◽  
Hot Wire ◽  
Plastic Substrates ◽  
Thin Film Silicon

Low Temperature Thin-film Silicon Diodes for Consumer Electronics

2005 ◽  
Vol 862 ◽  
Author(s):  
Qi Wang ◽  
Scott Ward ◽  
Anna Duda ◽  
Jian Hua ◽  
Paul Stradins ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Current Density ◽  
Voltage Drop ◽  
High Current Density ◽  
Consumer Electronics ◽  
High Current ◽  
Plastic Substrates ◽  
Forward Current ◽  
Thin Film Silicon

AbstractWe have developed high current density thin-film silicon n-i-p diodes for low cost and low temperature two-dimensional diode-logic memory array applications. The diodes are fabricated at temperatures below 250°C on glass, stainless steel, and plastic substrates using hot-wire chemical vapor deposition (CVD). The 0.01-mm2 standalone diodes have a forward current-density (J) of near 10 kA/cm2 and a rectification ratio over 107 at ±2 V. The 25 μm2 array diodes have J > 104 A/cm2 and rectification of 105 at ±2V. On plastic substrates, we have also used plasma-enhanced CVD to deposit 10-μm diameter diodes with J ˜ 5 x 104 A/cm2. We found that the use of microcrystalline silicon (μc-Si) i- and nlayers results in higher current-density diodes than with amorphous silicon. Reducing the diode area increases the forward current density by lowering the voltage drop across the external series resistances. A prototype diode array memory based on 10-micron devices was successfully demonstrated by monolithically integrating diodes with a-Si:H switching elements. High current density diodes have potential applications in a variety of large area, thin-film electronic devices, in addition to a-Si:H-based memory. This could widen the application of thin-film silicon beyond its present industrial applications in thin-film transistors, solar cells, bolometers and photo-detectors.

Modulated surface-textured substrates with high haze for thin-film silicon solar cells

2011 ◽  
Vol 1321 ◽  
Author(s):  
O. Isabella ◽  
P. Liu ◽  
B. Bolman ◽  
J. Krč ◽  
M. Zeman
Keyword(s):  
Thin Film ◽  
Surface Roughness ◽  
Zinc Oxide ◽  
Solar Cells ◽  
Sacrificial Layer ◽  
Flat Glass ◽  
Silicon Solar Cells ◽  
Glass Substrates ◽  
Thin Film Silicon ◽  
Surface Modulation

ABSTRACTModulated surface-textured substrates for thin-film silicon solar cells exhibiting high haze in a broad range of wavelengths were fabricated. Glass substrates coated with different thicknesses of a sacrificial layer were wet-etched allowing the manipulation of the surface morphology with surface roughness ranging from 200 nm up to 1000 nm. Subsequently, zinc-oxide layers were sputtered and then wet-etched constituting the final modulated textures. The morphological analysis of the substrates demonstrated the surface modulation, and the optical analysis revealed broad angle intensity distributions and high hazes. A small anti-reflective effect with respect to untreated glass was found for etched glass samples. The performance of solar cells on high-haze substrates was evaluated. The solar cells outperformed the reference cell fabricated on a randomly-textured zinc-oxide-coated flat glass. The trend in the efficiency resembled the increased surface roughness and the anti-reflective effect was confirmed also in solar cell devices.

Reaction Processes for Low Temperature (<150°C) Plasma Enhanced Deposition of Hydrogenated Amorphous Silicon Thin-Film Transistors on Transparent Plastic Substrates

1998 ◽  
Vol 508 ◽  
Author(s):  
Gregory N. Parsons ◽  
Chien-Sheng Yang ◽  
Tonya M. Klein ◽  
Laura Smith
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Low Temperature ◽  
Amorphous Silicon ◽  
Charge Trapping ◽  
Rf Plasma ◽  
Processing Temperature ◽  
Silicon Thin Film ◽  
Transparent Plastic ◽  
Plastic Substrates

AbstractThis article presents mechanisms for low temperature (<150°C) rf plasma enhanced chemical vapor deposition of silicon and silicon nitride thin films that lead to sufficient electronic quality for thin film transistor (TFT) fabrication and operation. For silicon deposition, hydrogen abstraction and etching, and silicon disproportionation reactions are identified that can lead to optimized hydrogen concentration and bonding environments at <150°C. Nitrogen dilution of SiH4/NH3 mixtures during silicon nitride deposition at low temperatures helps promote N-H bonding, leading to reduced charge trapping. Good quality amorphous silicon TFT's fabricated with a maximum processing temperature of 110 °C are demonstrated on flexible transparent plastic substrates. Transistors formed with the same process on glass and plastic show linear mobilities of 0.33 and 0.12 cm2/Vs, respectively, with ION/IOFF ratios > 106.

Reactive Ion Etched MO/CR Source-Drain Metallization for Amorphous Silicon Thin Film Transistors

1991 ◽  
Vol 219 ◽  
Author(s):  
R. F. Kwasnick ◽  
G. E. Possin ◽  
R. J. Saia
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Hydrogenated Amorphous Silicon ◽  
Wet Etching ◽  
Silicon Thin Film ◽  
Vertical Sidewall ◽  
Etch Stop ◽  
Wet Etch ◽  
Hydrogenated Amorphous

ABSTRACTA novel two step reactive ion etch (RIE) process is described for the etching of bilayer Mo/Cr source-drain metallization on hydrogenated amorphous silicon (a-Si:H) inverted-staggered thin film transistors. The Cr acts as an etch stop during Mo etching, and is thin enough (∼3 0 nm) that only a small thickness of underlying a-Si is removed during the Cr etch. The resulting Mo/Cr profile is sloped, compared to the more vertical and somewhat uncontrolled slope that is achieved with Mo wet etch. Very similar transistor behavior was observed for both Mo wet etched and Mo/Cr reactive ion etched source-drain metallization. The major advantage of this process over wet etching of Mo source-drain is improved step coverage of subsequently deposited layers due to the less vertical sidewall slope.

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