scholarly journals VLSI DESIGN PROCESS FOR LOW POWER DESIGN METHODOLOGY USING RECONFIGURABLE FPGA

2012 ◽  
Vol 01 (03) ◽  
pp. 516-520
Author(s):  
R. Rajendra Prasad .
Keyword(s):  
Low Power ◽  
Design Process ◽  
Design Methodology ◽  
Vlsi Design ◽  
Low Power Design

scholarly journals Low Power Design for ASIC Cores

VLSI Design ◽  
2001 ◽  
Vol 12 (3) ◽  
pp. 317-331
Author(s):  
Alvar Dean ◽  
David Garrett ◽  
Mircea R. Stan ◽  
Sebastian Ventrone
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Low Power Design ◽  
Clock Gating ◽  
Asic Design ◽  
Design Techniques

A semicustom ASIC design methodology is used to develop a low power DSP core for mobile (battery powered) applications. Different low power design techniques are used, including dual voltage, low power library elements, accurate power reporting, pseudomicrocode, transition-once logic, clock gating, and others.

scholarly journals Encoding Schemes for Reducing Transition Activity and Power Consumption in VLSI Interconnects-A Review

2018 ◽  
Vol 7 (3.1) ◽  
pp. 34
Author(s):  
Vithyalakshmi. N ◽  
Nagarajan P ◽  
Ashok Kumar.N ◽  
Vinoth. G.S
Keyword(s):  
Energy Dissipation ◽  
Power Consumption ◽  
Low Power ◽  
Vlsi Design ◽  
Low Power Design ◽  
System Size ◽  
Vlsi Circuits ◽  
Portable Devices ◽  
Dynamic Power ◽  
Transition Activity

Low power design is a foremost challenging issue in recent applications like mobile phones and portable devices. Advances in VLSI technology have enabled the realization of complicated circuits in single chip, reducing system size and power utilization. In low power VLSI design energy dissipation has to be more significant. So to minimize the power consumption of circuits various power components and their effects must be identified. Dynamic power is the major energy dissipation in micro power circuits. Bus transition activity is the major source of dynamic power consumption in low power VLSI circuits. The dynamic power of any complex circuits cannot be estimated by the simple calculations. Therefore this paper review different encoding schemes for reduction of transition activity and power dissipation. 

scholarly journals Low power design methodology in quantum-dot cellular automata

2022 ◽  
Vol 97 ◽  
pp. 107638
Author(s):  
Arindam Sadhu ◽  
Kunal Das ◽  
Debashis De ◽  
Maitreyi Ray Kanjilal
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Low Power ◽  
Design Methodology ◽  
Low Power Design ◽  
Quantum Dot Cellular Automata
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