Doherty Amplifier Design Based on Asymmetric Configuration Scheme

Abstract This paper presents a new Doherty power amplifier (DPA) with harmonics suppression. A Wilkinson power divider (WPD) with open-ended and short-ended stubs is designed to suppress unwanted signals. To design the power divider in the circuit of the DPA, even and odd mode analyses are utilized. The proposed design operates at range of 1.2–1.6 GHz. The linearity of the suggested DPA is increased about 6 dBm, in comparison with the main amplifier. The designed Doherty amplifier has a power added efficiency (PAE), drain efficiency (DE) and Gain about 60, 61% and 19 dB, respectively. The designed WPD suppresses 2nd up to 14th harmonics with more than 20 dB suppression level, which is useful for suppressing unwanted harmonics in DPA design. ATF-34143 transistors (pHEMT technology) are used for this DPA amplifier design. The main amplifier has class-F topology and class-F inverse topology is used for auxiliary amplifier.

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Improved Three-Stage Doherty Amplifier Design With Impedance Compensation in Load Combiner for Broadband Applications

IEEE Transactions on Microwave Theory and Techniques ◽

10.1109/tmtt.2018.2884404 ◽

2019 ◽

Vol 67 (2) ◽

pp. 778-786 ◽

Cited By ~ 14

Author(s):

Jing Xia ◽

Wenhua Chen ◽

Fan Meng ◽

Chao Yu ◽

Xiaowei Zhu

Keyword(s):

Amplifier Design ◽

Doherty Amplifier

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Design and analysis of 80-W wideband asymmetrical Doherty amplifier

International Journal of Microwave and Wireless Technologies ◽

10.1017/s1759078714000452 ◽

2014 ◽

Vol 7 (1) ◽

pp. 13-18 ◽

Cited By ~ 6

Author(s):

Khaled Bathich ◽

Georg Boeck

Keyword(s):

Output Power ◽

Performance Enhancement ◽

Limiting Factors ◽

Average Output ◽

Analysis And Design ◽

Power Added Efficiency ◽

Single Carrier ◽

Amplifier Design ◽

Flat Back ◽

Doherty Amplifier

This paper presents the analysis and design of a wideband asymmetrical Doherty amplifier. The frequency response of the output combining network of the Doherty amplifier with arbitrary back-off level configuration is analyzed. Other bandwidth-limiting factors were discussed and analyzed as well. A number of performance enhancement techniques were taken into consideration to obtain high and flat back-off efficiency over the amplifier design band of 1.7–2.25 GHz. The designed Doherty amplifier had, at 8.0–9.9 dB output back-off, a minimum efficiency of η = 50% [power-added efficiency of 45%], measured near 40 dBm of output power, and over 28% bandwidth. Using digital predistortion (DPD) linearization, an adjacent-channel leakage ratio (ACLR) of −43 dBc was obtained for a single-carrier W-CDMA signal, at 40.9 dBm and 46% of average output power and drain efficiency, respectively. The designed amplifier represents the first wideband Doherty amplifier reported over extended power back-off range.

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