Estimation of a performance parameter of Top-Lit Up-Draft cookstove using locally available wood feedstock

2021 ◽  
Author(s):  
Aarasi Singh ◽  
VINOD KUMAR YADAV ◽  
Devang Srivastava ◽  
Manish Kumar Singh ◽  
Shubham Maurya ◽  
...  
Keyword(s):  
Performance Parameter ◽  
A Performance

scholarly journals Significance of Body Weight as a Performance Parameter

1982 ◽  
Vol 61 (10) ◽  
pp. 1933-1938 ◽  
Author(s):  
HARPAL SINGH ◽  
A.W. NORDSKOG
Keyword(s):  
Body Weight ◽  
Performance Parameter ◽  
A Performance

scholarly journals Performance Parameter of AODV and DSR Potocol by Varying Nodes Mobility

2019 ◽  
Vol 9 (1) ◽  
pp. 4103-4105
Keyword(s):  
Performance Analysis ◽  
Wireless Network ◽  
Network Topology ◽  
Routing Protocol ◽  
Routing Protocols ◽  
Dynamic Routing ◽  
Performance Parameter ◽  
Transmission Range ◽  
Host Mobility ◽  
A Performance

MANET is a cluster of nodes that are mobile which transfer the packet within a limited transmission range. It is decentralized and infrastructure less wireless network. Due to host mobility requirement for a robust dynamic routing protocol is needed, since a random and dynamic difference in the network topology is there. This paper presents a performance analysis between two routing protocols AODV and DSR. In terms of throughput, PDR and delay both protocols AODV and DSR is compared.

scholarly journals BMI, a Performance Parameter for Speed Improvement

PLoS ONE ◽  
2014 ◽  
Vol 9 (2) ◽  
pp. e90183 ◽  
Author(s):  
Adrien Sedeaud ◽  
Andy Marc ◽  
Adrien Marck ◽  
Frédéric Dor ◽  
Julien Schipman ◽  
...  
Keyword(s):  
Performance Parameter ◽  
A Performance

Aircraft pitch attitude as a performance parameter

1982 ◽  
Vol 19 (5) ◽  
pp. 412-414
Author(s):  
M. E. Eshelby
Keyword(s):  
Performance Parameter ◽  
A Performance

scholarly journals Towards ultrahigh resolution OCT based endoscopical pituitary gland and adenoma screening: a performance parameter evaluation

2020 ◽  
Vol 11 (12) ◽  
pp. 7003
Author(s):  
Fabian Placzek ◽  
Alexander Micko ◽  
Ryan Sentosa ◽  
Roger Fonollà ◽  
Michael Winklehner ◽  
...  
Keyword(s):  
Pituitary Gland ◽  
Performance Parameter ◽  
Ultrahigh Resolution ◽  
Parameter Evaluation ◽  
A Performance

scholarly journals A Variable Processor Cache Line Size Architecture

2019 ◽  
Vol 8 (6) ◽  
pp. 1724-1727
Keyword(s):  
Energy Saving ◽  
Performance Improvement ◽  
Performance Parameter ◽  
Memory Access ◽  
Access Time ◽  
Time Interval ◽  
Cache Line ◽  
Fixed Line ◽  
Processor Caches ◽  
A Performance

Processor caches have fixed line size. A processor cache defined by tuple (C, k, L) where C is the capacity, k associativity and L line size has fixed values for the parameters. Algorithms to have variable processor cache line size are proposed in literature. This paper proposes algorithm to have variable cache line size based on the miss count for any application. The line size is varied by increasing or decreasing line size based on the miss count for any time interval. The algorithm can be used in running any application. The SPEC2000 benchmarks are used for simulating the proposed algorithm for cache with one level. The average memory access time is chosen as performance parameter. A performance improvement of 12% is observed with energy saving of 18% for chosen parameters.

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