A low noise and power efficient 45nm GPDK technology based highly stable current balancing logic (HCBL) and dynamic logic circuits for mixed signal systems

2017 ◽  
Vol 72 (1) ◽  
pp. 11-24
Author(s):  
S. Seenuvasamurthi ◽  
G. Nagarajan
2005 ◽  
Vol 15 (03) ◽  
pp. 599-614 ◽  
Author(s):  
YUYU LIU ◽  
JINGUO QUAN ◽  
HUAZHONG YANG ◽  
HUI WANG

In this paper, a logic style that is becoming increasingly popular is presented, which is called MOS Current Mode Logic (MCML). MCML is a novel and useful logic style for high-speed, low-power and mixed-signal applications. Its high-speed switching, low supply voltage and reduced output voltage swing contribute to its high performance, low power dissipation, and low noise features. MCML circuits are compared to several other logic styles, such as conventional static CMOS, dynamic logic, and traditional emitter coupled logic (ECL) in terms of power, delay and common mode noise immunity. MCML circuits seem to be very promising in high-speed, low-power and mixed-signal digital circuit applications, such as portable electronic devices, gigahertz microprocessors, and optical transceivers.


2013 ◽  
Vol 61 (3) ◽  
pp. 691-696 ◽  
Author(s):  
R. Suszynski ◽  
K. Wawryn

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.


2012 ◽  
Vol 1 (1) ◽  
pp. 1-7
Author(s):  
Vadim Geurkov ◽  
◽  
Lev Kirischian ◽  
Keyword(s):  

Integration ◽  
1998 ◽  
Vol 26 (1-2) ◽  
pp. 141-150
Author(s):  
Vishwani D Agrawal
Keyword(s):  

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