scholarly journals Selective Harmonic Elimination Based THD Minimization of a Symmetric 9-Level Inverter Using Ant Colony Optimization

2021 ◽  
Vol 8 (5) ◽  
pp. 769-774
Author(s):  
Neerudi Bhoopal ◽  
Dokku Sivanaga Malleswara Rao ◽  
Bharath Kumar Narukullapati ◽  
Idamakanti Kasireddy ◽  
Devineni Gireesh Kumar
Keyword(s):  
Ant Colony Optimization ◽  
Single Phase ◽  
Frequency Control ◽  
Harmonic Distortion ◽  
Low Frequency ◽  
Ant Colony ◽  
Medium Voltage ◽  
Semiconductor Switches ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination

This paper proposed a new topology of a symmetric single-phase multilevel inverter with the smaller number of semiconductor switches and optimized low-frequency control methods to optimize the Total Harmonic Distortion. A nine-level single phase output is obtained by eight number of active semiconductor switches, four diodes and four capacitors from two asymmetrical dc sources. The selected harmonic order in the output voltage is eliminated by the PWM (SHE-PWM) based on selective harmonic elimination. To optimize the switching angles, an ant colony optimization is introduced. The proposed SHE-PWM and ant optimization are implemented and tested for THD on the SIMULINK platform. The proposed approach offers less THD and is best suited to high-power applications with medium voltage.

scholarly journals Operation of a UXE-Type 11-Level Inverter with Voltage-Balance Modulation Using NLC and ACO-Based SHE

2021 ◽  
Vol 13 (16) ◽  
pp. 9035
Author(s):  
Mohammad Ali ◽  
Mohd Tariq ◽  
Chang-Hua Lin ◽  
Ripon K. Chakrobortty ◽  
Basem Alamri ◽  
...  
Keyword(s):  
Ant Colony Optimization ◽  
Direct Current ◽  
Control Algorithm ◽  
Ant Colony ◽  
Hardware In The Loop ◽  
Level Control ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Voltage Balance ◽  
Redundant States

In this article, the UXE-Type inverter is considered for eleven-level operation. This topology exhibits a boosting capability along with reduced switches and one source. An algorithm that utilizes the redundant states to control the voltage-balance of the auxiliary direct current (DC)-link is presented. The proposed control algorithm is capable of maintaining the voltages of each capacitor at Vdc/4 resulting in a successful multilevel operation for all values of load. The inverter is also compared with 11-level inverters. The modulation of the inverter is performed by employing nearest level control and ant colony optimization based selective harmonic elimination. The maximum inverter efficiency is 98.1% and its performance is validated on an hardware-in-the-loop platform.

scholarly journals A modified cascaded h-bridge multilevel inverter based on particle swarm optimisation (PSO) technique

2019 ◽  
Vol 16 (1) ◽  
pp. 41
Author(s):  
Mohammed Rasheed ◽  
Rosli Omar ◽  
Marizan Sulaiman ◽  
Wahidah Abd Halim
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Linear Equations ◽  
Harmonic Distortion ◽  
Particle Swarm ◽  
Multilevel Inverter ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Non Linear Equations

<span>In this paper, modified multilevel inverter, via addition of an auxiliary bidirectional switch, based on Newton Raphson (NR) and Particle Swarm Optimization (PSO) techniques is presented. The NR and PSO techniques were employed for selective harmonics elimination (SHE) solution in a modified Cascaded H Bridge Multilevel inverter (CHB-MLI). The Selective Harmonic Elimination Pulse-Width Modulation (SHE-PWM) is a powerful technique for harmonic minimization in multilevel inverter. The NR and PSO techniques were used to determine the switching angles by solving the non-linear equations of the output voltage waveform of the modified CHB-MLI in order to control the fundamental component and eliminate some low order harmonics. The proposed NR and PSO techniques are capable to minimize the Total Harmonic Distortion (THD) of the output voltage of the modified inverter within allowable limits. This paper aims to modeling and simulation by MATLAB of the modified topology of the CHB-MLI for a single-phase prototype for 13-levels. The inverter offers less THD and greater efficiency using PSO control algorithm compared with the NR algorithm. <br https://server9.kproxy.com/servlet/redirect.srv/sruj/snbzofspy/skvyzff/p1/> The performance of the proposed controllers based on NR and PSO techniques is verified through simulation.</span>

scholarly journals GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches: An Experimental Study

2019 ◽  
Vol 25 (3) ◽  
pp. 10-17
Author(s):  
Enes Bektas ◽  
Hulusi Karaca
Keyword(s):  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Power Electronic ◽  
Load Voltage ◽  
Medium Voltage ◽  
Multilevel Inverters ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Power Switches ◽  
First Time

In power electronic applications, especially high power and medium voltage, multilevel inverters (MLIs) have been commonly used. MLIs ensure high quality load voltage and lower Total Harmonic Distortion (THD) than traditional inverter. In this paper, a multilevel inverter structure with reduced number of power switches is proposed. The proposed multilevel inverter is lower costed than conventional MLI. Also, a Genetic Algorithm (GA) based Selective Harmonic Elimination (SHE) technique has been used for the first time in the proposed MLI structure with reduced number of switches. The proposed GA based SHE technique computes the optimum switching angles by solving nonlinear harmonic equations of multilevel inverter. Both Isochronous switching (IS) and SHE techniques have been applied to proposed MLI to demonstrate the effectiveness of the GA based SHE technique. Simulation and experimental results for 7, 11 and 13-level have been obtained. Results of 11-level inverter is analysed and given in detail. Results have clearly proved that desired order harmonics in proposed MLI topology can be eliminated by using GA based SHE technique and lower THD on the load voltage has been provided.

FPGA Based Selective Harmonic Elimination Technique for Multilevel Inverter

2018 ◽  
Vol 9 (1) ◽  
pp. 166 ◽  
Author(s):  
T. Porselvi ◽  
K. Deepa ◽  
R. Muthu
Keyword(s):  
Power Generation ◽  
Lower Order ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
New Technique ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Medium Range ◽  
Field Programmable ◽  
A New Technique

Harmonic elimination at the fundamental frequency is very much appropriate for high and medium range of power generation and applications. This paper considers a new technique for selective harmonic elimination (SHE), in which the total harmonic distortion (THD) is minimized when compared with that of the conventional one. With this technique, the harmonics at lower order are eliminated, which are more predominant than the higher ones.Cascaded H-Bridge inverter fed by a single DC is considered which is simulated with the switching angles generated by both the conventional method of SHE and the new method of SHE. The simulated results of the load voltage and the waveforms of the harmonic analysis are shown. The THD values are compared for the two techniques.  The experimental results are also shown for the new technique. The switching angles are generated with the help of field programmable gated array (FPGA) in the hardware. The value of experimental THD of voltage is compared with that of simulated THD and the comparison prove that the results are satisfactory.

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