P-24: Low Power a-Si:H TFT Gate Driver Circuit Employing Negative Turn Off Biasing
2011 ◽
Vol 42
(1)
◽
pp. 1181-1184
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Keyword(s):
2015 ◽
Vol 62
(1)
◽
pp. 136-142
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Keyword(s):
2016 ◽
Vol 12
(1)
◽
pp. 55-61
◽
2016 ◽
Vol 47
(1)
◽
pp. 1272-1275
◽
2012 ◽
Vol 59
(5)
◽
pp. 1410-1415
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Keyword(s):